XC912BC32CFU8 Motorola Semiconductor Products, XC912BC32CFU8 Datasheet - Page 108

• Manufacturer Part Number: XC912BC32CFU8
• Description: M68HC12B Family Data Sheet
• Manufacturer: Motorola Semiconductor Products

FLASH EEPROM
8.3.4 FLASH EEPROM Control Register
Data Sheet
108
NOTE:
STRE — Spare Test Row Enable Bit
MWPR — Multiple Word Programming Bit
This register controls the programming and erasure of the FLASH EEPROM.
FEESWAI — FLASH EEPROM Stop in Wait Control Bit
The FEESWAI bit cannot be asserted if the interrupt vector resides in the FLASH
EEPROM array.
SVFP — Status V
ERAS — Erase Control Bit
The spare test row consists of one FLASH EEPROM array row. The spare test
row is reserved and contains production test information which must be
maintained through several erase cycles. When STRE is set, the decoding for
the spare test row overrides the address lines which normally select the other
rows in the array.
Used primarily for testing, if MPWR = 1, the two least significant address lines,
ADDR1 and ADDR0, will be ignored when programming a FLASH EEPROM
location. The word location addressed if ADDR1 and ADDR0 = 00, along with
the word location addressed if ADDR1 and ADDR0 = 10, will both be
programmed with the same word data from the programming latches. This bit
should not be changed during programming.
SVFP is a read-only bit.
This bit can be read anytime or written when ENPE = 0. When set, all locations
in the array will be erased at the same time. The boot block will be erased only
if BOOTP = 0. This bit also affects the result of attempted array reads. See
Table 8-1
Address: $00F7
0 = LIB accesses are to the FLASH EEPROM array.
1 = Spare test row in array enabled if SMOD is active
0 = Multiple word programming disabled
1 = Program 32 bits of data
0 = Do not halt FLASH EEPROM clock when in wait mode.
1 = Halt FLASH EEPROM clock when in wait mode.
0 = Voltage of V
1 = Voltage of V
0 = FLASH EEPROM configured for programming
1 = FLASH EEPROM configured for erasure
Reset:
Read:
Write:
Figure 8-4. FLASH EEPROM Control Register (FEECTL)
for more information. Status of ERAS cannot change if ENPE is set.
Bit 7
0
0
FP
Voltage Bit
FP
FP
FLASH EEPROM
6
0
0
pin is below normal programming voltage levels.
pin is above normal programming voltage levels.
5
0
0
FEESWAI
4
0
SVFP
3
0
M68HC12B Family — Rev. 8.0
ERAS
2
0
LAT
1
0
MOTOROLA
ENPE
Bit 0
0