XC912BC32CFU8 Motorola Semiconductor Products, XC912BC32CFU8 Datasheet - Page 301
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XC912BC32CFU8
Manufacturer Part Number
XC912BC32CFU8
Description
M68HC12B Family Data Sheet
Manufacturer
Motorola Semiconductor Products
Datasheet
1.XC912BC32CFU8.pdf
(362 pages)
- Current page: 301 of 362
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17.1 Introduction
17.2 Functional Description
M68HC12B Family — Rev. 8.0
MOTOROLA
Data Sheet — M68HC12B Family
The ATD is an 8-channel, 10-bit, multiplexed-input, successive-approximation,
analog-to-digital converter, accurate to ± 2 least significant bit (LSB). It does not
require external sample and hold circuits because of the type of charge
redistribution technique used. The ATD converter timing is synchronized to the
system P clock. The ATD module consists of a 16-word (32-byte) memory-mapped
control register block used for control, testing, and configuration.
A single conversion sequence consists of four or eight conversions, depending on
the state of the select 8-channel mode (S8CM) bit when ATDCTL5 is written. There
are eight basic conversion modes. In the non-scan modes, the SCF bit is set after
the sequence of four or eight conversions has been performed and the ATD
module halts. In the scan modes, the SCF bit is set after the first sequence of four
or eight conversions has been performed, and the ATD module continues to restart
the sequence. In both modes, the CCF bit associated with each register is set when
that register is loaded with the appropriate conversion result. That flag is cleared
automatically when that result register is read. The conversions are started by
writing to the control registers.
Analog-to-Digital Converter (ATD)
Section 17. Analog-to-Digital Converter (ATD)
Data Sheet
301
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