XC912BC32CFU8 Motorola Semiconductor Products, XC912BC32CFU8 Datasheet - Page 179

• Manufacturer Part Number: XC912BC32CFU8
• Description: M68HC12B Family Data Sheet
• Manufacturer: Motorola Semiconductor Products

13.4.6 Timer System Control Register
M68HC12B Family — Rev. 8.0
MOTOROLA
Read: Anytime
Write: Anytime
TEN — Timer Enable Bit
TSWAI — Timer Module Stops While in Wait Bit
TSBCK — Timer and Modulus Counter Stop While in Background Mode Bit
TFFCA — Timer Fast Flag Clear All Bit
If for any reason the timer is not active, there is no ÷64 clock for the pulse
accumulator since the E ÷ 64 is generated by the timer prescaler.
TSWAI also affects pulse accumulators and modulus down counters.
TBSCK does not stop the pulse accumulator.
Address: $0086
Reset:
Read:
Write:
0 = Disables the main timer, including the counter; can be used for reducing
1 = Allows the timer to function normally
0 = Allows the timer module to continue running during wait
1 = Disables the timer module when the MCU is in wait mode. Timer
0 = Allows the timer and modulus counter to continue running while in
1 = Disables the timer and modulus counter whenever the MCU is in
0 = Allows the timer flag clearing to function normally
1 = For TFLG1($8E), a read from an input capture or a write to the output
power consumption
interrupts cannot be used to get the MCU out of wait.
background mode
background mode. This is useful for emulation.
compare channel ($90–$9F) causes the corresponding channel flag,
CnF, to be cleared. For TFLG2 ($8F), any access to the TCNT register
($84, $85) clears the TOF flag. Any access to the PACN3 and PACN2
registers ($A2, $A3) clears the PAOVF and PAIF flags in the PAFLG
register ($A1). Any access to the PACN1 and PACN0 registers ($A4,
$A5) clears the PBOVF flag in the PBFLG register ($B1). This has the
advantage of eliminating software overhead in a separate clear
sequence. Extra care is required to avoid accidental flag clearing due to
unintended accesses.
Bit 7
TEN
Figure 13-11. Timer System Control Register (TSCR)
Enhanced Capture Timer (ECT) Module
0
= Unimplemented
TSWAI
6
0
TSBCK
5
0
TFFCA
4
0
Enhanced Capture Timer (ECT) Module
3
0
2
0
Timer Registers
1
0
Data Sheet
Bit 0
0
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