XC912BC32CFU8 Motorola Semiconductor Products, XC912BC32CFU8 Datasheet - Page 33
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XC912BC32CFU8
Manufacturer Part Number
XC912BC32CFU8
Description
M68HC12B Family Data Sheet
Manufacturer
Motorola Semiconductor Products
Datasheet
1.XC912BC32CFU8.pdf
(362 pages)
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1.6.4 Port Signals
M68HC12B Family — Rev. 8.0
MOTOROLA
Port A
PA7–PA0
Port B
PB7–PB0
Port AD
PAD7–PAD0
Port DLC/PCAN
PDLC6–PDLC0
PCAN6–PCAN2
Port E
PE7–PE0
Port P
PP7–PP0
Port S
PS7–PS0
Port T
PT7–PT0
1. Port DLC applies to the MC68HC912B32 and MC68HC12BE32 and PCAN to the MC68HC(9)12BC32.
Port Name
(1)
26–29, 35–38
79, 80, 1–6
16–12, 9–7
Numbers
The MCU incorporates eight ports which are used to control and access the various
device subsystems. When not used for these purposes, port pins may be used for
general-purpose I/O. In addition to the pins described here, each port consists of:
After reset, all port pins are configured as input. (Refer to
of the port signal descriptions.)
46–39
25–18
58–51
70–76
68–61
Pin
•
•
A data register which can be read and written at any time
With the exception of port AD and PE1–PE0, a data direction register which
controls the direction of each pin
Table 1-4. Port Description Summary
DD Register (Address)
DDRDLC ($00FF)
PE7–PE2 In/Out
Data Direction
DDRS ($00D7)
DDRA ($0002)
DDRB ($0003)
DDRE ($0009)
DDRP ($0057)
DDRT ($00AF)
PE1–PE0 In
In/Out
In/Out
In/Out
In/Out
In/Out
In/Out
General Description
In
Port A and port B pins are used for address and data in
expanded modes. The port data registers are not in the
address map during expanded and peripheral mode
operation. When in the map, port A and port B can be
read or written anytime.
DDRA and DDRB are not in the address map in
expanded or peripheral modes.
Analog-to-digital converter and general-purpose I/O
Byte data link communication (BDLC) subsystem and
general-purpose I/O
Mode selection, bus control signals, and interrupt
service request signals; or general-purpose I/O
General-purpose I/O. PP3–PP0 are used with the
pulse-width modulator when enabled.
Serial communications interface and serial peripheral
interface subsystems and general-purpose I/O
General-purpose I/O when not enabled for input capture
and output compare in the timer and pulse accumulator
subsystem
Description
Pinout and Signal Descriptions
Table 1-4
General Description
for a summary
Data Sheet
33
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