XC912BC32CFU8 Motorola Semiconductor Products, XC912BC32CFU8 Datasheet - Page 310
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XC912BC32CFU8
Manufacturer Part Number
XC912BC32CFU8
Description
M68HC12B Family Data Sheet
Manufacturer
Motorola Semiconductor Products
Datasheet
1.XC912BC32CFU8.pdf
(362 pages)
- Current page: 310 of 362
- Download datasheet (5Mb)
Analog-to-Digital Converter (ATD)
17.3.8 ATD Test Registers
Data Sheet
310
Read: Special modes only
Write: Special modes only
The test registers control various special modes which are used during
manufacturing. In the normal modes, reads of the test register return 0 and writes
have no effect.
SAR9–SAR0 — SAR Data Bits
RST — Module Reset Bit
TSTOUT — Multiplex Output of TST3–TST0 (Factory Use)
TST3–TST0 — Test Bits 3 to 0 (Reserved)
Reads of this byte return the current value in the SAR. Writes to this byte change
the SAR to the value written. Bits SAR9–SAR0 reflect the 10 SAR bits used
during the resolution process for an 10-bit result.
When set, this bit causes all registers and activity in the module to assume the
same state as out of power-on reset (except for ADPU bit in ATDCTL2, which
remains set, allowing the ATD module to remain enabled).
Selects one of 16 reserved factory testing modes
Address: $0068
Address: $0069
Reset:
Reset:
Read:
Read:
Write:
Write:
SAR9
SAR1
Bit 7
Bit 7
0
0
Analog-to-Digital Converter (ATD)
Figure 17-9. ATD Test Register (ATDSTAT)
SAR8
SAR0
6
0
6
0
SAR7
RST
5
0
5
0
TSTOUT
SAR6
4
0
4
0
SAR5
TST3
3
0
3
0
M68HC12B Family — Rev. 8.0
SAR4
TST2
2
0
2
0
SAR3
TST1
1
0
1
0
MOTOROLA
SAR2
TST0
Bit 0
Bit 0
0
0
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