XC912BC32CFU8 Motorola Semiconductor Products, XC912BC32CFU8 Datasheet - Page 269

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XC912BC32CFU8

Manufacturer Part Number
XC912BC32CFU8
Description
M68HC12B Family Data Sheet
Manufacturer
Motorola Semiconductor Products
Datasheet
M68HC12B Family — Rev. 8.0
MOTOROLA
2. Four identifier acceptance filters, each to be applied to:
3. Eight identifier acceptance filters, each to be applied to the first eight bits of
4. Closed filter. No CAN message will be copied into the foreground buffer
Figure 16-4
CIDMR0–CIDMR3) produces filter 0 and 1 hit. Similarly, the second filter
bank (CIDAR4–CUIDAR7, CIDMR4–CIDMR7) produces filter 2 and three
hits.
ID28
ID10
AC7
AC7
AC7
AC7
the identifier. This mode implements eight independent filters for the first
eight bits of a CAN 2.0A compliant standard identifier or of a CAN 2.0B
compliant extended identifier.
bank (CIDAR0–CIDAR3, CIDMR0–CIDMR3) produces filter 0 to three hits.
Similarly, the second filter bank (CIDAR4–CUIDAR7, CIDMR4–CIDMR7)
produces filter 4 to seven hits.
RxFG, and the RXF flag will never be set.
a. 11 bits of the identifier and the RTR bit of CAN 2.0A messages, or
b. 14 most significant bits of the identifier of CAN 2.0B messages
CIDMRO
CIDARO
CIDMR2
CIDAR2
IDR0
IDR0
ID accepted (Filter 0 hit)
ID accepted (Filter 1 hit)
Figure 16-4. 16-Bit Maskable Acceptance Filters
ID21 ID20
AC0 AC7
AC0 AC7
AC0 AC7
AC0 AC7
shows how the first 32-bit filter bank (CIDAR0–CIDAR3,
ID3 ID2
msCAN12 Controller
CIDMR1
CIDMR3
CIDAR1
CIDAR3
IDR1
IDR1
IDE
ID15 ID14
AC0
AC0
AC0
AC0
Figure 16-5
IDR2
shows how the first 32-bit filter
ID7
Identifier Acceptance Filter
ID6
msCAN12 Controller
IDR3
RTR
Data Sheet
269

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