XC912BC32CFU8 Motorola Semiconductor Products, XC912BC32CFU8 Datasheet - Page 295

• Manufacturer Part Number: XC912BC32CFU8
• Description: M68HC12B Family Data Sheet
• Manufacturer: Motorola Semiconductor Products

16.12.10 msCAN12 Receive Error Counter
16.12.11 msCAN12 Transmit Error Counter
16.12.12 msCAN12 Identifier Acceptance Registers
M68HC12B Family — Rev. 8.0
MOTOROLA
NOTE:
This register reflects the status of the msCAN12 receive error counter. The register
is read only.
This register reflects the status of the msCAN12 transmit error counter. The
register is read only.
Both error counters may be read only when in sleep or soft-reset mode.
On reception, each message is written into the background receive buffer. The
CPU is only signalled to read the message if it passes the criteria in the identifier
acceptance and identifier mask registers (accepted); otherwise, the message will
be overwritten by the next message (dropped).
The acceptance registers of the msCAN12 are applied on the IDR0 to IDR3
registers of incoming messages in a bit-by-bit manner.
For extended identifiers, all four acceptance and mask registers are applied. For
standard identifiers only the first two (CIDMR0/CIDMR1 and CIDAR0/CIDAR1) are
applied.
Address: $010E
Address: $010F
Reset:
Reset:
Read:
Read:
Write:
Write:
Figure 16-26. msCAN12 Transmit Error Counter (CTXERR)
Figure 16-25. msCAN12 Receive Error Counter (CRXERR)
RXERR7
TXERR7
Bit 7
Bit 7
0
0
= Unimplemented
= Unimplemented
RXERR6
TXERR6
msCAN12 Controller
6
0
6
0
RXERR5
TXERR5
5
0
5
0
RXERR4
TXERR4
4
0
4
0
Programmer’s Model of Control Registers
RXERR3
TXERR3
3
0
3
0
RXERR2
TXERR2
2
0
2
0
msCAN12 Controller
RXERR1
TXERR1
1
0
1
0
Data Sheet
RXERR0
TXERR0
Bit 0
Bit 0
0
0
295