XC912BC32CFU8 Motorola Semiconductor Products, XC912BC32CFU8 Datasheet - Page 268

• Manufacturer Part Number: XC912BC32CFU8
• Description: M68HC12B Family Data Sheet
• Manufacturer: Motorola Semiconductor Products

msCAN12 Controller
16.4 Identifier Acceptance Filter
Data Sheet
268
The identifier acceptance registers (CIDAR0–CIADAR7) define the acceptable
patterns of the standard or extended identifier (ID10–ID0 or ID28–ID0). Any of
these bits can be marked don’t care in the identifier mask registers
(CIDMR0–CIDMR7).
A filter hit is indicated to the application software by:
These identifier hit flags (IDHIT2–IDHIT0) clearly identify the filter section that
caused the acceptance. They simplify the application software’s task to identify the
cause of the receiver interrupt. When more than one hit occurs (two or more filters
match), the lower hit has priority.
A flexible, programmable generic identifier acceptance filter has been introduced
to reduce the CPU interrupt loading. The filter is programmable to operate in four
different modes:
1. Two identifier acceptance filters, each to be applied to the full 29 bits of the
•
•
A set RXF (receive buffer full flag)
See
Three bits in the identifier acceptance control register
See
identifier and to three bits of the CAN frame: RTR, IDE, and SRR. This mode
implements two filters for a full length CAN 2.0B compliant extended
identifier.
(CIDAR0–CIDAR3, CIDMR0–CIDMR3) produces a filter 0 hit. Similarly, the
second filter bank (CIDAR4–CUIDAR7, CIDMR4–CIDMR7) produces a
filter 1 hit.
ID28
ID10
AC7
AC7
Figure 16-3. 32-Bit Maskable Identifier Acceptance Filter
CIDMRO
CIDARO
16.12.5 msCAN12 Receiver Flag
16.12.9 msCAN12 Identifier Acceptance Control
IDR0
IDR0
Figure 16-3
ID21 ID20
AC0 AC7
AC0 AC7
ID3 ID2
msCAN12 Controller
CIDMR1
CIDAR1
shows how the first 32-bit filter bank
IDR1
IDR1
ID accepted (Filter 0 hit)
IDE
ID15 ID14
AC0 AC7
AC0 AC7
Register) and
CIDMR2
CIDAR2
IDR2
AC0
AC0
ID7
M68HC12B Family — Rev. 8.0
ID6
AC7
AC7
Register).
CIDMR3
CIDAR3
IDR3
RTR
MOTOROLA
AC0
AC0