XC912BC32CFU8 Motorola Semiconductor Products, XC912BC32CFU8 Datasheet - Page 216
XC912BC32CFU8
Manufacturer Part Number
XC912BC32CFU8
Description
M68HC12B Family Data Sheet
Manufacturer
Motorola Semiconductor Products
Datasheet
1.XC912BC32CFU8.pdf
(362 pages)
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Serial Interface
14.3.3 SS Output
14.3.4 Bidirectional Mode (MOMI or SISO)
Data Sheet
216
SCK (CPOL = 0)
SCK (CPOL = 1)
SAMPLE I
MOSI/MISO
CHANGE O
CHANGE O
SEL SS (O)
MASTER ONLY
SEL SS (I)
MOSI PIN
MISO PIN
LSB first (LSBF = 1) :
MSB first (LSBF= 0) :
TRANSFER
Available in master mode only, SS output is enabled with the SSOE bit in the
SP0CR1 register if the corresponding DDRS bit is set. The SS output pin is
connected to the SS input pin of the external slave device. The SS output
automatically goes low for each transmission to select the external device and it
goes high during each idling state to deselect external devices.
In bidirectional mode, the SPI uses only one serial data pin for external device
interface. The MSTR bit decides which pin to be used. The MOSI pin becomes a
serial data I/O (MOMI) pin for the master mode, and the MISO pin becomes a serial
data I/O (SISO) pin for the slave mode. The direction of each serial I/O pin depends
on the corresponding DDRS bit.
t
L
Figure 14-13. SPI Clock Format 1 (CPHA = 1)
MSB
LSB
DDS7
BEGIN
0
0
1
1
Bit 6
Bit 1
Bit 5
Bit 2
SSOE
0
1
0
1
Serial Interface
Table 14-3. SS Output Selection
Bit 4
Bit 3
SS input with MODF feature
Reserved
General-purpose output
SS output
Bit 3
Bit 4
Master Mode
Bit 2
Bit 5
Bit 1
Bit 6
END
M68HC12B Family — Rev. 8.0
MSB
LSB
Slave Mode
t
T
SS input
SS input
SS input
SS input
Minimum 1/2 SCK
t
I
for t
t
T
L
, t
l
, t
L
MOTOROLA
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