XC912BC32CFU8 Motorola Semiconductor Products, XC912BC32CFU8 Datasheet - Page 191

• Manufacturer Part Number: XC912BC32CFU8
• Description: M68HC12B Family Data Sheet
• Manufacturer: Motorola Semiconductor Products

13.4.14 16-Bit Modulus Down-Counter Control Register
M68HC12B Family — Rev. 8.0
MOTOROLA
NOTE:
The two 8-bit pulse accumulators, PAC1 and PAC0, are cascaded to form the
PACB 16-bit pulse accumulator. When PACB in enabled, (PBEN = 1 in PBCTL,
$B0) the PACN1 and PACN0 register contents are, respectively, the high and low
bytes of the PACB.
When PACN1 overflows from $FF to $00, the interrupt flag PBOVF in PBFLG ($B1)
is set. Full count register access should take place in one clock cycle. A separate
read/write for high byte and low byte will give a different result than accessing them
as a word.
Read: Anytime
Write: Anytime
MCZI — Modulus Counter Underflow Interrupt Enable Bit
MODMC — Modulus Mode Enable Bit
For proper operation, the MCEN bit should be cleared before modifying the
MODMC bit to reset the modulus counter to $FF.
RDMCL — Read Modulus Down-Counter Load Bit
ICLAT — Input Capture Force Latch Action Bit
When input capture latch mode is enabled (LATQ and BUFEN bit in ICSYS
($AB) are set), writing 1 to this bit immediately forces the contents of the input
capture registers TC0 to TC3 and their corresponding 8-bit pulse accumulators
to be latched into the associated holding registers. The pulse accumulators will
be automatically cleared when the latch action occurs.
Writing 0 to this bit has no effect. Read of this bit aways will return 0.
Figure 13-35. 16-Bit Modulus Down-Counter Control Register (MCCTL)
Address: $00A6
Reset:
Read:
Write:
0 = Modulus counter interrupt is disabled.
1 = Modulus counter interrupt is enabled.
0 = The counter counts once from the value written to it and will stop at
1 = Modulus mode is enabled. When the counter reaches $0000, the counter
0 = Reads of the modulus count register will return the present value of the
1 = Reads of the modulus count register will return the contents of the load
$0000.
is loaded with the latest value written to the modulus count register.
count register.
register.
MCZI
Bit 7
Enhanced Capture Timer (ECT) Module
0
MODMC
6
0
RDMCL
5
0
ICLAT
4
0
Enhanced Capture Timer (ECT) Module
FLMC
3
0
MCEN
2
0
MCPR1
Timer Registers
1
0
Data Sheet
MCPR0
Bit 0
0
191