XC912BC32CFU8 Motorola Semiconductor Products, XC912BC32CFU8 Datasheet - Page 305

• Manufacturer Part Number: XC912BC32CFU8
• Description: M68HC12B Family Data Sheet
• Manufacturer: Motorola Semiconductor Products

17.3.5 ATD Control Register 4
M68HC12B Family — Rev. 8.0
MOTOROLA
NOTE:
The ATD control register 3 (ATDCTL3) is used to select the power-up mode,
interrupt control, and freeze control.
Writing to this register aborts any current conversion sequence and suspends
module operation at breakpoint.
FRZ1 and FRZ0 — Background Debug (Freeze) Enable Bits
The ATD control register 4 (ATDCTL4) selects the clock source and sets up the
prescaler. Writes to the ATD control registers initiate a new conversion sequence.
If a write occurs while a conversion is in progress, the conversion is aborted and
ATD activity halts until a write to ATDCTL5 occurs.
S10BM — ATD 10-Bit Mode Control Bit
SMP1 and SMP0 — Select Sample Time Bits
When debugging an application, it is useful in many cases to have the ATD
pause when a breakpoint is encountered. These two bits determine how the
ATD will respond when background debug mode becomes active. See
Table
These bits are used to select one of four sample times after the buffered sample
and transfer has occurred. See
Address: $0064
Reset:
Read:
Write:
FRZ1
0 = 8-bit operation
1 = 10-bit operation
0
0
1
1
17-1.
Table 17-1. ATD Response to Background Debug Enable
S10BM
Bit 7
0
FRZ0
Figure 17-6. ATD Control Register 4 (ATDCTL4)
Analog-to-Digital Converter (ATD)
0
1
0
1
SMP1
6
0
Continue conversions in active background mode
Reserved
Finish current conversion, then freeze
Freeze when BDM is active
SMP0
5
0
Table
PRS4
4
0
17-2.
ATD Response
PRS3
3
0
Analog-to-Digital Converter (ATD)
PRS2
2
0
PRS1
1
0
ATD Registers
Data Sheet
PRS0
Bit 0
1
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