XC912BC32CFU8 Motorola Semiconductor Products, XC912BC32CFU8 Datasheet - Page 131

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XC912BC32CFU8

Manufacturer Part Number
XC912BC32CFU8
Description
M68HC12B Family Data Sheet
Manufacturer
Motorola Semiconductor Products
Datasheet
M68HC12B Family — Rev. 8.0
MOTOROLA
P CLOCK
÷
÷
÷
÷
÷
÷
÷
÷
2
2
2
2
2
2
2
2
BITS: SPR2, SPR1, AND SPR0
REGISTER: SP0BR
0:0:1
0:1:0
0:1:1
1:0:0
1:0:1
1:1:0
1:1:1
0:0:0
Figure 10-13. Clock Chain for SPI, ATD, and BDM
COUNTER (PR0-PR4)
5-BIT MODULUS
Clock Generation Module (CGM)
BIT RATE
SPI
SYNCHRONIZER
E CLOCK
LOGIC
BKGD
PIN
÷
2
BKGD DIRECTION
BKGD OUT
BKGD IN
TO ATD
BDM BIT CLOCK:
Receive: Detect falling edge,
count 12 E clocks, sample input
Transmit 1: Detect falling edge,
count 6 E clocks while output is
high impedance, drive out 1 E
cycle pulse high,
high-impedance output again
Transmit 0: Detect falling edge,
drive out low, count 9 E clocks,
drive out 1 E cycle pulse high,
high-impedance output
Clock Generation Module (CGM)
Clock Divider Chains
Data Sheet
131

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