XC912BC32CFU8 Motorola Semiconductor Products, XC912BC32CFU8 Datasheet - Page 151

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XC912BC32CFU8

Manufacturer Part Number
XC912BC32CFU8
Description
M68HC12B Family Data Sheet
Manufacturer
Motorola Semiconductor Products
Datasheet
12.3.1 Timer Input Capture/Output Compare Select Register
12.3.2 Timer Compare Force Register
M68HC12B Family — Rev. 8.0
MOTOROLA
Read: Anytime
Write: Anytime
IOS7–IOS0 —Input Capture or Output Compare Channel
Designator Bits
Read: Anytime, always returns $00 (1 state is transient)
Write: Anytime
FOC7–FOC0 — Force Output Compare Action Bits for Channels 7–0
Address: $0080
Address: $0081
A write to this register with the corresponding data bit(s) set causes the action
which is programmed for output compare n to occur immediately. The action
taken is the same as if a successful comparison had just taken place with the
TCn register except that the interrupt flag does not get set.
Reset:
Reset:
Read:
Read:
Write:
Write:
0 = Corresponding channel acts as an input capture.
1 = Corresponding channel acts as an output compare.
FOC7
IOS7
Figure 12-3. Timer Compare Force Register (CFORC)
Bit 7
Bit 7
0
0
Figure 12-2. Timer Input Capture/Output Compare
Standard Timer Module (TIM)
FOC6
IOS6
6
0
6
0
Select Register (TIOS)
FOC5
IOS5
5
0
5
0
FOC4
IOS4
4
0
4
0
FOC3
IOS3
3
0
3
0
Standard Timer Module (TIM)
FOC2
IOS2
2
0
2
0
FOC1
IOS1
1
0
1
0
Block Diagram
Data Sheet
FOC0
IOS0
Bit 0
Bit 0
0
0
151

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