XC912BC32CFU8 Motorola Semiconductor Products, XC912BC32CFU8 Datasheet - Page 293

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XC912BC32CFU8

Manufacturer Part Number
XC912BC32CFU8
Description
M68HC12B Family Data Sheet
Manufacturer
Motorola Semiconductor Products
Datasheet
16.12.8 msCAN12 Transmitter Control Register
M68HC12B Family — Rev. 8.0
MOTOROLA
NOTE:
NOTE:
NOTE:
To ensure data integrity, no registers of the transmit buffers should be written to
while the associated TXE flag is cleared.The CTFLG register is held in the reset
state if the SFTRES bit CMCR0 is set.
ABTRQ2–ABTRQ0 — Abort Request Bits
The software must not clear one or more of the TXE flags in CTFGL and
simultaneously set the respective ABTRQ bit(s).
TXEIE2–TXEIE0 — Transmitter Empty Interrupt Enable Bits
The CTCR register is held in the reset state when the SFTRES bit in CMCR0 is set.
successfully due to a pending abort request. See
Control
set.
Clearing a TXEx flag also clears the corresponding ABTAKx flag. When a TXEx
flag is set, the corresponding ABTRQx bit is cleared. See
Transmitter Control
The CPU sets an ABTRQx bit to request that a scheduled message buffer
(TXEx = 0) shall be aborted. The msCAN12 grants the request if the message
has not already started transmission, or if the transmission is not successful
(lost arbitration or error). When a message is aborted, the associated TXE and
the abort acknowledge flag (ABTAK) (see
Register) are set and an TXE interrupt is generated if enabled. The CPU cannot
reset ABTRQx. ABTRQx is cleared implicitly whenever the associated TXE flag
is set.
Address: $0107
Reset:
Read:
Write:
0 = The associated message buffer is full (loaded with a message due for
1 = The associated message buffer is empty (not scheduled).
0 = No abort request
1 = Abort request pending
0 = No interrupt will be generated from this event.
1 = A transmitter empty (transmit buffer available for transmission) event will
Figure 16-23. msCAN12 Transmitter Control Register (CTCR)
transmission).
result in a transmitter empty interrupt.
Register. If not masked, a transmit interrupt is pending while this flag is
Bit 7
0
0
= Unimplemented
ABTRQ2
msCAN12 Controller
6
0
Register.
ABTRQ1
5
0
ABTRQ0
4
0
Programmer’s Model of Control Registers
16.12.7 msCAN12 Transmitter Flag
3
0
0
16.12.8 msCAN12 Transmitter
TXEIE2
2
0
16.12.8 msCAN12
msCAN12 Controller
TXEIE1
1
0
Data Sheet
TXEIE0
Bit 0
0
293

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