XC912BC32CFU8 Motorola Semiconductor Products, XC912BC32CFU8 Datasheet - Page 347

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XC912BC32CFU8

Manufacturer Part Number
XC912BC32CFU8
Description
M68HC12B Family Data Sheet
Manufacturer
Motorola Semiconductor Products
Datasheet
19.14 Control Timing
M68HC12B Family — Rev. 8.0
MOTOROLA
Frequency of operation
E-clock period
Crystal frequency
External oscillator frequency
Processor control setup time
Reset input pulse width
Mode programming setup time
Mode programming hold time
Interrupt pulse width, IRQ edge-sensitive mode
Wait recovery startup time
Timer input capture pulse width
Pulse accumulator pulse width
1. RESET is recognized during the first clock cycle it is held low. Internal circuitry then drives the pin low for 16 clock cycles,
t
To guarantee external reset vector
Minimum input time (can be pre-empted by internal reset)
PW
t
PW
PCSU
WRS
releases the pin, and samples the pin level eight cycles later to determine the source of the interrupt.
IRQ
TIM
= 4 t
= t
= 2 t
= 2 t
cyc
cyc
PT7
PT7
Notes:
PT7–PT0
PT7–PT0
/2+ 20
cyc
cyc
1. Rising edge sensitive input
2. Falling edge sensitive input
1
2
+ 20
+ 20
(1)
(2)
(1)
Characteristic
PW
PW
TIM
PA
Figure 19-5. Timer Inputs
Electrical Specifications
PW
Symbol
PW
PW
t
PW
f
t
t
t
PCSU
XTAL
2 f
MPH
WRS
t
MPS
cyc
f
RSTL
o
IRQ
TIM
o
PA
TBD
Min
125
270
270
dc
dc
82
32
10
2
4
8.0 MHz
Electrical Specifications
Max
16.0
16.0
8.0
4
Control Timing
Data Sheet
MHz
MHz
MHz
Unit
t
t
t
ns
ns
ns
ns
ns
ns
cyc
cyc
cyc
347

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