XC912BC32CFU8 Motorola Semiconductor Products, XC912BC32CFU8 Datasheet - Page 93

• Manufacturer Part Number: XC912BC32CFU8
• Description: M68HC12B Family Data Sheet
• Manufacturer: Motorola Semiconductor Products

M68HC12B Family — Rev. 8.0
MOTOROLA
NDBE — No Data Bus Enable Bit
CGMTE — CGM Test Output Enable
PIPOE — Pipe Signal Output Enable Bit
NECLK — No External E Clock Bit
LSTRE — Low Strobe (LSTRB) Enable Bit
Normal: Write once
Special: Write anytime except the first time
Normal: Write once
Special: Write anytime except the first time.
This bit is read at anytime.
Normal: Write once
Special: Write anytime except the first time.
This bit has no effect in single chip modes.
In expanded modes, writes to this bit have no effect. E clock is required for
demultiplexing the external address; NECLK remains 0 in expanded modes.
NECLK can be written once in normal single-chip mode and can be written
anytime in special single-chip mode.
Normal: Write once
Special: Write anytime except the first time
This bit has no effect in single-chip modes or normal expanded narrow mode.
LSTRB is used during external writes. After reset in normal expanded mode,
LSTRB is disabled. If needed, it should be enabled before external writes.
External reads do not normally need LSTRB because all 16 data bits can be
driven even if the MCU only needs eight bits of data.
TAGLO is a shared function of the PE3/LSTRB pin. In special expanded modes
with LSTRE set and the BDM instruction tagging on, a 0 at the falling edge of E
tags the instruction word low byte being read into the instruction queue.
1 = PE7 used for general-purpose I/O
0 = PE7 used for external control of data enables on memories
1 = PE6 is a test signal output from the CGM module (no effect in single chip
0 = PE6 is a general-purpose I/O or pipe output.
1 = PE6–PE5 are outputs and indicate state of instruction queue.
0 = PE6–PE5 are general-purpose I/O.
1 = PE4 is a general-purpose I/O pin.
0 = PE4 is the external E clock pin subject to this limitation: In single-chip
1 = PE3 is configured as the LSTRB bus-control output.
0 = PE3 is a general-purpose I/O pin.
or normal expanded modes). PIPOE = 1 overrides this function and
forces PE6 to be a pipe status output signal.
modes, PE4 is general-purpose I/O unless NECLK = 0 and either IVIS =
1 or ESTR = 0. A 16-bit write to PEAR:MODE can configure all three bits
in one operation.
Bus Control and Input/Output (I/O)
Bus Control and Input/Output (I/O)
Data Sheet
Registers
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