XC912BC32CFU8 Motorola Semiconductor Products, XC912BC32CFU8 Datasheet - Page 152
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XC912BC32CFU8
Manufacturer Part Number
XC912BC32CFU8
Description
M68HC12B Family Data Sheet
Manufacturer
Motorola Semiconductor Products
Datasheet
1.XC912BC32CFU8.pdf
(362 pages)
- Current page: 152 of 362
- Download datasheet (5Mb)
Standard Timer Module (TIM)
12.3.3 Output Compare 7 Mask Register
12.3.4 Output Compare 7 Data Register
Data Sheet
152
Read: Anytime
Write: Anytime
The bits of OC7M correspond bit-for-bit with the bits of the timer port (PORTT).
Setting the OC7Mn sets the corresponding port to be an output port regardless of
the state of the DDRTn bit when the corresponding TIOSn bit is set to be an output
compare. This does not change the state of the DDRT bits.
Read: Anytime
Write: Anytime
The bits of OC7D correspond bit-for-bit with the bits of the timer port (PORTT).
When a successful OC7 compare occurs, for each bit that is set in OC7M, the
corresponding data bit in OC7D is stored to the corresponding bit of the timer port.
When the OC7Mn bit is set, a successful OC7 action will override a successful
OC6–OC0 compare action during the same cycle; therefore, the OCn action taken
will depend on the corresponding OC7D bit.
Address: $0082
Address: $0083
Reset:
Reset:
Read:
Read:
Write:
Write:
OC7M7
OC7D7
Figure 12-4. Output Compare 7 Mask Register (OC7M)
Figure 12-5. Output Compare 7 Data Register (OC7D)
Bit 7
Bit 7
0
0
Standard Timer Module (TIM)
OC7M6
OC7D6
6
0
6
0
OC7M5
OC7D5
5
0
5
0
OC7M4
OC7D4
4
0
4
0
OC7M3
OC7D3
3
0
3
0
OC7M2
OC7D2
M68HC12B Family — Rev. 8.0
2
0
2
0
OC7M1
OC7D1
1
0
1
0
MOTOROLA
OC7M0
OC7D0
Bit 0
Bit 0
0
0
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