XC912BC32CFU8 Motorola Semiconductor Products, XC912BC32CFU8 Datasheet - Page 136

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XC912BC32CFU8

Manufacturer Part Number
XC912BC32CFU8
Description
M68HC12B Family Data Sheet
Manufacturer
Motorola Semiconductor Products
Datasheet
Pulse-Width Modulator (PWM)
11.2.2 PWM Clock Select and Polarity Register
Data Sheet
136
CON23 — Concatenate PWM Channels 2 and 3 Bit
CON01 — Concatenate PWM Channels 0 and 1 Bit
PCKA2–PCKA0 — Prescaler for Clock A Bits
PCKB2–PCKB0 — Prescaler for Clock B Bits
Read: Anytime
Write: Anytime
When concatenated, channel 2 becomes the high-order byte and channel 3
becomes the low-order byte. Channel 2 output pin is used as the output for this
16-bit PWM (bit 2 of port P). Channel 3 clock-select control bits determines the
clock source.
When concatenated, channel 0 becomes the high-order byte and channel 1
becomes the low-order byte. Channel 0 output pin is used as the output for this
16-bit PWM (bit 0 of port P). Channel 1 clock-select control bits determine the
clock source.
Clock A is one of two clock sources which may be used for channels 0 and 1.
These three bits determine the rate of clock A, as shown in
Clock B is one of two clock sources which may be used for channels 2 and 3.
These three bits determine the rate of clock B, as shown in
Address: $0041
Reset:
Read:
Write:
PCKA2 (PCKB2)
0 = Channels 2 and 3 are separate 8-bit PWMs.
1 = Channels 2 and 3 are concatenated to create one 16-bit PWM channel.
0 = Channels 0 and 1 are separate 8-bit PWMs.
1 = Channels 0 and 1 are concatenated to create one 16-bit PWM channel.
Figure 11-5. PWM Clock Select and Polarity Register (PWPOL)
PCLK3
0
0
0
0
1
1
1
1
Bit 7
0
Pulse-Width Modulator (PWM)
Table 11-1. Clock A and Clock B Prescaler
PCLK2
6
0
PCKA1 (PCKB1)
0
0
1
1
0
0
1
1
PCLK1
5
0
PCLK0
4
0
PCKA0 (PCKB0)
0
1
0
1
0
1
0
1
PPOL3
3
0
PPOL2
M68HC12B Family — Rev. 8.0
2
0
Value of Clock A (B)
Table
Table
E ÷ 128
E ÷ 16
E ÷ 32
E ÷ 64
E ÷ 2
E ÷ 4
E ÷ 8
PPOL1
E
1
0
11-1.
11-1.
MOTOROLA
PPOL0
Bit 0
0

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