XC912BC32CFU8 Motorola Semiconductor Products, XC912BC32CFU8 Datasheet - Page 146

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XC912BC32CFU8

Manufacturer Part Number
XC912BC32CFU8
Description
M68HC12B Family Data Sheet
Manufacturer
Motorola Semiconductor Products
Datasheet
Pulse-Width Modulator (PWM)
11.2.15 Port P Data Direction Register
11.3 PWM Boundary Cases
11.4 Using the Output Compare 7 Feature to Generate a PWM
Data Sheet
146
NOTE:
pin level. When configured as output, a read returns the latched output data.
A write drives associated pins only if configured for output and the corresponding
PWM channel is not enabled. After reset, all pins are general-purpose,
high-impedance inputs.
Read: Anytime
Write: Anytime
DDRP determines pin direction of port P when used for general-purpose I/O. When
cleared, I/O pin is configured for input. When set, I/O pin is configured for output.
The boundary conditions for the PWM channel duty registers and the PWM
channel period registers cause the results shown in
This timer exercise is intended to utilize the output compare function along with the
output compare 7 new feature to generate a PWM waveform. It must allow for the
duty used to drive a DC motor on the UDLP1 board. The registers must be
initialized accordingly TC7 = period and TC5 = high time (duty cycle). See
11-28.
To verify program is working the DC motor must turn, the frequency, high time, and
duty cycle must displayed on the LCD.
Address: $0057
Reset:
Read:
Write:
DDP7
Bit 7
Figure 11-27. Port P Data Direction Register (DDRP)
0
≥PWPERx
≥PWPERx
PWDTYx
Pulse-Width Modulator (PWM)
$FF
$FF
Table 11-2. PWM Boundary Conditions
DDP6
6
0
DDP5
PWPERx
5
0
>$00
>$00
$00
$00
DDP4
4
0
PPOLx
DDP3
1
0
1
0
1
0
3
0
Table
M68HC12B Family — Rev. 8.0
DDP2
2
0
11-2.
Output
High
High
High
Low
Low
Low
DDP1
1
0
MOTOROLA
Figure
DDP0
Bit 0
0

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