HD64F2638F20J Renesas Electronics America, HD64F2638F20J Datasheet - Page 119
HD64F2638F20J
Manufacturer Part Number
HD64F2638F20J
Description
IC H8S MCU FLASH 256K 128-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2600r
Specifications of HD64F2638F20J
Core Processor
H8S/2600
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, SCI, SmartCard
Peripherals
Motor Control PWM, POR, PWM, WDT
Number Of I /o
72
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
128-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
HD64F2638F20J
Manufacturer:
PENESAS
Quantity:
252
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H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
2.9
2.9.1
The H8S/2600 CPU is driven by a system clock, denoted by the symbol φ. The period from one
rising edge of φ to the next is referred to as a "state." The memory cycle or bus cycle consists of
one, two, or three states. Different methods are used to access on-chip memory, on-chip
supporting modules, and the external address space.
2.9.2
On-chip memory is accessed in one state. The data bus is 16 bits wide, permitting both byte and
word transfer instruction. Figure 2-17 shows the on-chip memory access cycle. Figure 2-18 shows
the pin states.
REJ09B0103-0800 Rev. 8.00
May 28, 2010
Overview
On-Chip Memory (ROM, RAM)
Basic Timing
φ
Internal address bus
Read
access
Write
access
Internal read signal
Internal data bus
Internal write signal
Internal data bus
Figure 2-17 On-Chip Memory Access Cycle
Bus cycle
Address
T
1
Read data
Write data
Page 69 of 1458
Section 2 CPU
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