HD64F2638F20J Renesas Electronics America, HD64F2638F20J Datasheet - Page 551

• Manufacturer Part Number: HD64F2638F20J
• Description: IC H8S MCU FLASH 256K 128-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2600r

Specifications of HD64F2638F20J

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: CAN, SCI, SmartCard
• Peripherals: Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 72
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 128-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
In serial reception, the SCI operates as described below.
[1] The SCI performs internal initialization in synchronization with serial clock input or output.
[2] The received data is stored in RSR in LSB-to-MSB order.
[3] If the RIE bit in SCR is set to 1 when the RDRF flag changes to 1, a receive data full interrupt
• Simultaneous serial data transmission and reception (clocked synchronous mode)
REJ09B0103-0800 Rev. 8.00
May 28, 2010
Serial
clock
Serial
data
RDRF
ORER
After reception, the SCI checks whether the RDRF flag is 0 and the receive data can be
transferred from RSR to RDR.
If this check is passed, the RDRF flag is set to 1, and the receive data is stored in RDR. If a
receive error is detected in the error check, the operation is as shown in table 13-11.
Neither transmit nor receive operations can be performed subsequently when a receive error
has been found in the error check.
(RXI) request is generated.
Also, if the RIE bit in SCR is set to 1 when the ORER flag changes to 1, a receive error
interrupt (ERI) request is generated.
Figure 13-19 shows an example of SCI operation in reception.
Figure 13-20 shows a sample flowchart for simultaneous serial transmit and receive
operations.
The following procedure should be used for simultaneous serial data transmit and receive
operations.
RXI interrupt request
generated
Figure 13-19 Example of SCI Operation in Reception
Bit 7
RDR data read and
RDRF flag cleared to 0
in RXI interrupt service
routine
Bit 0
1 frame
Bit 7
Bit 0
RXI interrupt request
generated
Section 13 Serial Communication Interface (SCI)
Bit 1
ERI interrupt request
generated by overrun
error
Bit 6
Page 501 of 1458
Bit 7