HD64F2638F20J Renesas Electronics America, HD64F2638F20J Datasheet - Page 521

IC H8S MCU FLASH 256K 128-QFP

HD64F2638F20J

Manufacturer Part Number
HD64F2638F20J
Description
IC H8S MCU FLASH 256K 128-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2600r
Datasheets

Specifications of HD64F2638F20J

Core Processor
H8S/2600
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, SCI, SmartCard
Peripherals
Motor Control PWM, POR, PWM, WDT
Number Of I /o
72
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
128-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F2638F20J
Manufacturer:
PENESAS
Quantity:
252
H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
Bit 2—Smart Card Data Invert (SINV): Specifies inversion of the data logic level. The SINV
bit does not affect the logic level of the parity bit(s): parity bit inversion requires inversion of the
O/E bit in SMR.
Bit 2
SINV
0
1
Bit 1—Reserved: This bit is always read as 1 and cannot be modified.
Bit 0—Smart Card Interface Mode Select (SMIF): When the smart card interface operates as a
normal SCI, 0 should be written in this bit.
Bit 0
SMIF
0
1
13.2.10 Module Stop Control Register B (MSTPCRB)
MSTPCRB is 8-bit readable/writable registers that perform module stop mode control.
Setting any of bits MSTPB7 to MSTBP5 to 1 stops SCI0 to SCI2 operating and enter module stop
mode on completion of the bus cycle. For details, see section 23A.5, 23B.5, Module Stop Mode.
MSTPCRB is initialized to H'FF by a reset and in hardware standby mode. They are not initialized
by a manual reset and in software standby mode.
REJ09B0103-0800 Rev. 8.00
May 28, 2010
MSTPCRB
Bit
Initial value
R/W
Description
TDR contents are transmitted without modification
Receive data is stored in RDR without modification
TDR contents are inverted before being transmitted
Receive data is stored in RDR in inverted form
Description
Operates as normal SCI (smart card interface function disabled)
Smart card interface function enabled
:
:
:
MSTPB7
R/W
7
1
MSTPB6
R/W
6
1
MSTPB5
R/W
5
1
MSTPB4
R/W
4
1
MSTPB3
Section 13 Serial Communication Interface (SCI)
R/W
3
1
MSTPB2
R/W
2
1
MSTPB1
R/W
1
1
(Initial value)
(Initial value)
Page 471 of 1458
MSTPB0
R/W
0
1

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