HD64F2638F20J Renesas Electronics America, HD64F2638F20J Datasheet - Page 294
HD64F2638F20J
Manufacturer Part Number
HD64F2638F20J
Description
IC H8S MCU FLASH 256K 128-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2600r
Specifications of HD64F2638F20J
Core Processor
H8S/2600
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, SCI, SmartCard
Peripherals
Motor Control PWM, POR, PWM, WDT
Number Of I /o
72
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
128-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Available stocks
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
HD64F2638F20J
Manufacturer:
PENESAS
Quantity:
252
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Section 9 I/O Ports
Port 3 Data Register (P3DR)
P3DR is an 8-bit readable/writable register, which stores the output data of port 3 pins (P35 to
P30).
P3DR is initialized to B'**000000 by a reset and in hardware standby mode. The previous state is
maintained in software standby mode.
Port 3 Register (PORT3)
Note: * Determined by the state of pins P35 to P30.
PORT3 is an 8-bit read-dedicated register, which reflects the state of pins. Write is disenabled.
Always carry out writing off output data of port 3 pins (P35 to P30) to P3DR without fail.
When P3DDR is set to 1, if port 3 is read, the values of P3DR are read. When P3DDR is cleared to
0, if port 3 is read, the states of pins are read out.
P3DDR and P3DR are initialized by a reset and in hardware standby mode, so PORT3 is
determined by the state of the pins. The previous state is maintained in software standby mode.
Page 244 of 1458
Bit
Initial value
Read/Write
Bit
Initial value
Read/Write
Undefined
Undefined
⎯
⎯
⎯
⎯
7
7
Undefined
Undefined
⎯
⎯
⎯
⎯
6
6
P35DR
R/W
P35
⎯*
R
5
0
5
P34DR
R/W
P34
⎯*
R
4
0
4
P33DR
R/W
P33
⎯*
R
3
0
3
P32DR
R/W
P32
⎯*
R
2
0
2
H8S/2639, H8S/2638, H8S/2636,
REJ09B0103-0800 Rev. 8.00
H8S/2630, H8S/2635 Group
P31DR
R/W
P31
⎯*
R
1
0
1
May 28, 2010
P30DR
R/W
P30
⎯*
R
0
0
0
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