HD64F2638F20J Renesas Electronics America, HD64F2638F20J Datasheet - Page 585

IC H8S MCU FLASH 256K 128-QFP

HD64F2638F20J

Manufacturer Part Number
HD64F2638F20J
Description
IC H8S MCU FLASH 256K 128-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2600r
Datasheets

Specifications of HD64F2638F20J

Core Processor
H8S/2600
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, SCI, SmartCard
Peripherals
Motor Control PWM, POR, PWM, WDT
Number Of I /o
72
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
128-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F2638F20J
Manufacturer:
PENESAS
Quantity:
252
H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
REJ09B0103-0800 Rev. 8.00
May 28, 2010
(1) Data write
(2) Transfer from
(3) Serial data output
Note: When the ERS flag is set, it should be cleared until transfer of the last bit (D7 in LSB-first
I/O data
TXI
(TEND interrupt)
In case of normal transmission: TEND flag is set
In case of transmit error:
TDR to TSR
Legend:
Ds:
D0 to D7: Data bits
Dp:
DE:
Note: etu: Elementary time unit (time for transfer of 1 bit)
When GM = 0
When GM = 1
transmission, D0 in MSB-first transmission) of the next transfer data to be transmitted has
been completed.
Figure 14-5 Relation Between Transmit Operation and Internal Registers
Figure 14-6 TEND Flag Generation Timing in Transmission Operation
Start bit
Parity bit
Error signal
Ds
Data 1
Data 1
Data 1
TDR
D0 D1 D2 D3 D4 D5 D6 D7 Dp
ERS flag is set
Steps (2) and (3) above are repeated until the TEND flag is set
(shift register)
11.0 etu
Data 1
TSR
12.5 etu
; Data remains in TDR
Data 1
Section 14 Smart Card Interface
I/O signal line output
Guard
time
DE
Page 535 of 1458

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