HD64F2638F20J Renesas Electronics America, HD64F2638F20J Datasheet - Page 669

IC H8S MCU FLASH 256K 128-QFP

HD64F2638F20J

Manufacturer Part Number
HD64F2638F20J
Description
IC H8S MCU FLASH 256K 128-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2600r
Datasheets

Specifications of HD64F2638F20J

Core Processor
H8S/2600
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, SCI, SmartCard
Peripherals
Motor Control PWM, POR, PWM, WDT
Number Of I /o
72
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
128-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F2638F20J
Manufacturer:
PENESAS
Quantity:
252
H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
16.2
16.2.1
The master control register (MCR) is an 8-bit readable/writable register that controls the CAN
interface.
Bit 7—HCAN Sleep Mode Release (MCR7): Enables or disables HCAN sleep mode release by
bus operation.
Bit 7: MCR7
0
1
Bit 6—Reserved: This bit always reads 0. The write value should always be 0.
Bit 5—HCAN Sleep Mode (MCR5): Enables or disables HCAN sleep mode transition.
Bit 5: MCR5
0
1
Bits 4 and 3—Reserved: These bits always read 0. The write value should always be 0.
Bit 2—Message Transmission Method (MCR2): Selects the transmission method for transmit
messages.
Bit 2: MCR2
0
1
REJ09B0103-0800 Rev. 8.00
May 28, 2010
Initial value:
MCR
Register Descriptions
Master Control Register (MCR)
R/W:
Bit:
MCR7
Description
HCAN sleep mode release by CAN bus operation disabled
HCAN sleep mode release by CAN bus operation enabled
Description
HCAN sleep mode released
Transition to HCAN sleep mode enabled
Description
Transmission order determined by message identifier priority (Initial value)
Transmission order determined by mailbox (buffer) number priority
(TXPR1 > TXPR15)
R/W
7
0
R
6
0
MCR5
R/W
5
0
R
4
0
R
Section 16 Controller Area Network (HCAN)
3
0
MCR2
R/W
2
0
MCR1
R/W
1
0
(Initial value)
(Initial value)
Page 619 of 1458
MCR0
R/W
0
1

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