HD64F2638F20J Renesas Electronics America, HD64F2638F20J Datasheet - Page 535
HD64F2638F20J
Manufacturer Part Number
HD64F2638F20J
Description
IC H8S MCU FLASH 256K 128-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2600r
Specifications of HD64F2638F20J
Core Processor
H8S/2600
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, SCI, SmartCard
Peripherals
Motor Control PWM, POR, PWM, WDT
Number Of I /o
72
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
128-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Available stocks
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
HD64F2638F20J
Manufacturer:
PENESAS
Quantity:
252
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H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
Table 13-11 Receive Errors and Conditions for Occurrence
Receive Error
Overrun error
Framing error
Parity error
Figure 13-8 shows an example of the operation for reception in asynchronous mode.
REJ09B0103-0800 Rev. 8.00
May 28, 2010
RDRF
FER
1
Start
bit
0
D0
Abbreviation
ORER
FER
PER
Figure 13-8 Example of SCI Operation in Reception
D1
(Example with 8-Bit Data, Parity, One Stop Bit)
1 frame
Data
D7
Occurrence Condition
When the next data reception is
completed while the RDRF flag
in SSR is set to 1
When the stop bit is 0
When the received data differs
from the parity (even or odd) set
in SMR
RXI interrupt
request
generated
Parity
bit
0/1
Stop
bit
1
Start
bit
0
RDR data read and RDRF
flag cleared to 0 in RXI
interrupt service routine
D0
Section 13 Serial Communication Interface (SCI)
D1
Data
Data Transfer
Receive data is not
transferred from RSR to
RDR
Receive data is transferred
from RSR to RDR
Receive data is transferred
from RSR to RDR
D7
Parity
bit
ERI interrupt request
generated by framing
error
0/1
Stop
bit
0
Page 485 of 1458
Idle state
(mark state)
1
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