HD64F2638F20J Renesas Electronics America, HD64F2638F20J Datasheet - Page 782

IC H8S MCU FLASH 256K 128-QFP

HD64F2638F20J

Manufacturer Part Number
HD64F2638F20J
Description
IC H8S MCU FLASH 256K 128-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2600r
Datasheets

Specifications of HD64F2638F20J

Core Processor
H8S/2600
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, SCI, SmartCard
Peripherals
Motor Control PWM, POR, PWM, WDT
Number Of I /o
72
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
128-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F2638F20J
Manufacturer:
PENESAS
Quantity:
252
Section 19 Motor Control PWM Timer
19.4
19.4.1
PWM waveforms are output from pins PWM1A to PWM1H as shown in figure 19-10.
Initial Settings: Set the PWM output polarity in PWPR1; enable the pins for PWM output with
PWOCR1; select the clock to be input to PWCNT1 with bits CKS2 to CKS0 in PWCR1; set the
PWM conversion cycle in PWCYR1; and set the first frame of data in PWBFR1A, PWBFR1C,
PWBFR1E, and PWBFR1G.
Activation: When the CST bit in PWCR1 is set to 1, a compare match between PWCNT1 and
PWCYR1 is generated. Data is transferred from PWBFR1A to PWDTR1A, from PWBFR1C to
PWDTR1C, from PWBFR1E to PWDTR1E, and from PWBFR1G to PWDTR1G. PWCNT1
starts counting up. At the same time the CMF bit in PWCR1 is set, so that, if the IE bit in PWCR1
has been set, an interrupt can be requested or the DTC can be activated.
Waveform Output: The PWM outputs selected by the OTS bits in PWDTR1A/C/E/G go high
when a compare match occurs between PWCNT1 and PWCYR1. The PWM outputs not selected
by the OTS bits are low. When a compare match occurs between PWCNT1 and
PWDTR1A/C/E/G, the corresponding PWM output goes low. If the corresponding bit in PWPR1
is set to 1, the output is inverted.
Page 732 of 1458
PWCYR1
PWBFR1A
PWDTR1A
PWM1A
PWM1B
Operation
PWM Channel 1 Operation
OTS (PWDTR1A) = 0
Figure 19-10 PWM Channel 1 Operation
OTS (PWDTR1A) = 1
OTS (PWDTR1A) = 0
H8S/2639, H8S/2638, H8S/2636,
REJ09B0103-0800 Rev. 8.00
H8S/2630, H8S/2635 Group
OTS (PWDTR1A) = 1
May 28, 2010

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