HD64F2638F20J Renesas Electronics America, HD64F2638F20J Datasheet - Page 327
HD64F2638F20J
Manufacturer Part Number
HD64F2638F20J
Description
IC H8S MCU FLASH 256K 128-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2600r
Specifications of HD64F2638F20J
Core Processor
H8S/2600
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, SCI, SmartCard
Peripherals
Motor Control PWM, POR, PWM, WDT
Number Of I /o
72
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
128-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Available stocks
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Manufacturer
Quantity
Price
Company:
Part Number:
HD64F2638F20J
Manufacturer:
PENESAS
Quantity:
252
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H8S/2639, H8S/2638, H8S/2636,
H8S/2630, H8S/2635 Group
Port C Data Register (PCDR)
PCDR is an 8-bit readable/writable register that stores output data for the port C pins (PC7 to
PC0).
PCDR is initialized to H'00 by a reset, and in hardware standby mode. It retains its prior state in
software standby mode.
Port C Register (PORTC)
Note: * Determined by state of pins PC7 to PC0.
PORTC is an 8-bit read-only register that shows the pin states. It cannot be written to. Writing of
output data for the port C pins (PC7 to PC0) must always be performed on PCDR.
If a port C read is performed while PCDDR bits are set to 1, the PCDR values are read. If a port C
read is performed while PCDDR bits are cleared to 0, the pin states are read.
After a reset and in hardware standby mode, PORTC contents are determined by the pin states, as
PCDDR and PCDR are initialized. PORTC retains its prior state in software standby mode.
REJ09B0103-0800 Rev. 8.00
May 28, 2010
Bit
Initial value :
R/W
Bit
Initial value :
R/W
:
:
:
:
PC7DR
R/W
PC7
— *
R
7
0
7
PC6DR
R/W
PC6
— *
R
6
0
6
PC5DR
R/W
PC5
— *
R
5
0
5
PC4DR
R/W
PC4
— *
R
4
0
4
PC3DR
R/W
PC3
— *
R
3
0
3
PC2DR
R/W
PC2
— *
R
2
0
2
PC1DR
R/W
PC1
— *
R
1
0
1
Section 9 I/O Ports
Page 277 of 1458
PC0DR
R/W
PC0
— *
R
0
0
0
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