MC68302EH16C Freescale Semiconductor, MC68302EH16C Datasheet - Page 130

IC MPU MULTI-PROTOCOL 132-PQFP

MC68302EH16C

Manufacturer Part Number
MC68302EH16C
Description
IC MPU MULTI-PROTOCOL 132-PQFP
Manufacturer
Freescale Semiconductor

Specifications of MC68302EH16C

Processor Type
M683xx 32-Bit
Speed
16MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
132-MQFP, 132-PQFP
Controller Family/series
68K
Core Size
32 Bit
Ram Memory Size
1152Byte
Cpu Speed
16MHz
No. Of Timers
3
Embedded Interface Type
SCP, TDM
Digital Ic Case Style
PQFP
Rohs Compliant
Yes
Family Name
M68000
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
16MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
5V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
132
Package Type
PQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

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Communications Processor (CP)
When using the IDL or GCI buses, additional control functions in the frame structure are re-
quired. These functions are supported in the MC68302 through two SMC channels: SMC1
and SMC2. (For other matters relating to the SMCs, refer to 4.7 Serial Management Con-
trollers (SMCs)).
The serial interface also supports two testing modes: echo and loopback. Echo mode pro-
vides a return signal from the physical interface by retransmitting the signal it has received.
The physical interface echo mode differs from the individual SCC echo mode in that it can
operate on the entire multiplexed signal rather than just on a particular SCC channel (which
may further have particular bits masked). Loopback mode causes the physical interface to
receive the same signal it is transmitting. The physical interface loopback mode checks
more than the individual SCC loopback mode; it checks the physical interface and the inter-
nal channel routes.
Refer to Figure 4-5 for the serial channels physical interface block diagram.
M68000 DATA BUS
SIMASK
SIMODE
MASK REGISTER
MODE REGISTER
TO SMC1
TO SMC2
TO SCC1
TO SCC2
TO SCC3
MUX
MUX
MUX
PHYSICAL INTERFACE BUS
TIME-SLOT
LAYER-1 BUS
ASSIGNER
INTERFACE
SCC2
SCC3
ISDN INTERFACE OR SCC1
Figure 4-5. Serial Channels Physical Interface Block Diagram
4-10
MC68302 USER’S MANUAL
MOTOROLA

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