MC68302EH16C Freescale Semiconductor, MC68302EH16C Datasheet - Page 418

• Manufacturer Part Number: MC68302EH16C
• Description: IC MPU MULTI-PROTOCOL 132-PQFP
• Manufacturer: Freescale Semiconductor

Specifications of MC68302EH16C

• Processor Type: M683xx 32-Bit
• Speed: 16MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 132-MQFP, 132-PQFP
• Controller Family/series: 68K
• Core Size: 32 Bit
• Ram Memory Size: 1152Byte
• Cpu Speed: 16MHz
• No. Of Timers: 3
• Embedded Interface Type: SCP, TDM
• Digital Ic Case Style: PQFP
• Rohs Compliant: Yes
• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 16MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 5V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 132
• Package Type: PQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

MC68302 Applications
A synchronous UART built with transparent mode has one simplifying difference from a 5-
or 6-bit UART. Since a clock is provided with each bit, the transparent mode can be clocked
at 1x the data rate, reducing the transparent bandwidth and the buffer memory require-
ments. The only disadvantage is that the M68000 core must build the transmit buffer up a
bit at a time using bit instructions.
D.8.13 SCP as a Transparent Mode Alternative
One often overlooked feature of the MC68302 is the SCP. If your application needs byte-at-
a-time transparent mode operation, the SCP may fit the bill. The SCP, a subset of the Mo-
torola synchronous SPI protocol interface, transmits and receives bytes in a transparent
mode.
Each time the M68000 core sets the start bit in the SCP, one byte of data is shifted from the
SCP buffer descriptor out on the SPTXD pin (see Figure D-31). At the same time that trans-
mit data is being clocked out, receive data is being clocked into the MC68302.
The advantages of using the SCP instead of an SCC in transparent mode are simplicity and
the saving of SCCs for other functions. There are two disadvantages, however. First, the
M68000 core must be individually involved in each byte transferred (an interrupt may be
generated per byte); thus, data cannot be sent back-to-back without at least some delay.
Second, the SCP functions in a clock master mode only; therefore, the device communicat-
ing with the SCP must be able to accept an external input clock.
It is possible for the SCP to interface externally to one of the MC68302's SCCs. For instance,
this type interface could be used to convert HDLC-encoded data from a serial format to a
parallel format so that it can be moved over the M68000 bus.
D.8.14 Transparent Mode Summary
The totally transparent mode on the MC68302 can be used in many ways. Once the desired
physical interface is chosen (NSMI, PCM, IDL, or GCI), the vast number of possibilities can
begin to be narrowed down. These possibilities were described in D.8 Using the MC68302
Transparent Mode, with emphasis on the NMSI and PCM modes. A step-by-step register
initialization was given for a transparent loopback application on SCC2. It was also stated
that occasionally BISYNC mode can be used in place of an SCC in transparent mode.
D-68
MC68302 USER’S MANUAL
MOTOROLA