MC68302EH16C Freescale Semiconductor, MC68302EH16C Datasheet - Page 396

IC MPU MULTI-PROTOCOL 132-PQFP

MC68302EH16C

Manufacturer Part Number
MC68302EH16C
Description
IC MPU MULTI-PROTOCOL 132-PQFP
Manufacturer
Freescale Semiconductor

Specifications of MC68302EH16C

Processor Type
M683xx 32-Bit
Speed
16MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
132-MQFP, 132-PQFP
Controller Family/series
68K
Core Size
32 Bit
Ram Memory Size
1152Byte
Cpu Speed
16MHz
No. Of Timers
3
Embedded Interface Type
SCP, TDM
Digital Ic Case Style
PQFP
Rohs Compliant
Yes
Family Name
M68000
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
16MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
5V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
132
Package Type
PQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

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MC68302 Applications
protocol, where a 16x oversampling is employed to effectively extract the clock information
from the data. With transparent mode (and all the other protocols), this clock can be gener-
ated internally with a baud rate generator or can be provided externally.
D.8.2 Applications for Transparent Mode
There are several basic applications for the use of transparent mode.
First, some data may need to be moved serially but may not require protocol superimposed
— for example, voice data. There is no reason to encode voice data, and no error correction
is needed. With voice data, an occasional dropped bit will not interfere with the data stream
in any significant way. The MC68302 transparent mode works well for this type of applica-
tion.
Second, some board-level applications require a serial-to-parallel and parallel-to-serial con-
version. Often this is done to allow communication between chips on the same board. The
D-46
NOTE: The M68000 core on the master controls all six SCCs.
16.67
MHz
MC68302 MASTER
EXTAL
CORE
SCC1
SCC2
SCC3
PI/O
68K
M68000 BUS
Figure D-20. Dual Master-Slave System
DISCPU
BGACK
CLKO
BCLR
PB11
MC68302 USER’S MANUAL
A23
BG
BR
AS, UDS, LDS, R/W, DTACK
4K
A22-A1 AND D15-D0
+5V
+5V
10K
2K
+5V
10K
+5V
820
IOUT2
EXTAL
BR
BG
BGACK
BCLR
+5V
5
CORE
10K
68K
A23
MC68302 SLAVE
SCC1
SCC2
SCC3
MOTOROLA
DISCPU
+5V

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