MC68302EH16C Freescale Semiconductor, MC68302EH16C Datasheet - Page 448
MC68302EH16C
Manufacturer Part Number
MC68302EH16C
Description
IC MPU MULTI-PROTOCOL 132-PQFP
Manufacturer
Freescale Semiconductor
Datasheets
1.MC68302AG20C.pdf
(4 pages)
2.MC68302AG20C.pdf
(2 pages)
3.MC68302AG20C.pdf
(13 pages)
4.MC68302EH16C.pdf
(481 pages)
Specifications of MC68302EH16C
Processor Type
M683xx 32-Bit
Speed
16MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
132-MQFP, 132-PQFP
Controller Family/series
68K
Core Size
32 Bit
Ram Memory Size
1152Byte
Cpu Speed
16MHz
No. Of Timers
3
Embedded Interface Type
SCP, TDM
Digital Ic Case Style
PQFP
Rohs Compliant
Yes
Family Name
M68000
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
16MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
5V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
132
Package Type
PQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
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- MC68302AG20C PDF datasheet
- MC68302AG20C PDF datasheet #2
- MC68302AG20C PDF datasheet #3
- MC68302EH16C PDF datasheet #4
- Current page: 448 of 481
- Download datasheet (2Mb)
SCC Programming Reference
E.2.1.4.1 Receive BD Control/Status Word. To initialize the buffer, the user should write
bits 15-12 and clear bits 11-0. The IMP clears bit 15 when the buffer is closed and sets bits
5-0 depending on which error occurred.
E—Empty
X—External Buffer
W—Wrap (final BD in table)
I—Interrupt
C—Control Character
A—Address
M—Address Match
ID—IDLE Reception
E-26
OFFSET + 0
OFFSET +2
OFFSET +4
OFFSET +6
0 = This data buffer is full or has been closed due to an error condition.
1 = This data buffer is empty; must be set by the user to enable reception into this buff-
0 = The data butter associated with this BD is in internal dual-port RAM.
1 = The data buffer associated with this BD is in external memory.
0 = This is not the last BD in the receive BD table.
1 = This is the last BD in the receive BD table.
0 = The RX bit in the event register is not set when this buffer is closed.
1 = The RX bit in the event register is set when this buffer is closed.
0 = This buffer does not contain a control character.
1 = The last byte of this buffer contains a control character.
0 = This buffer contains data only.
1 = The first byte of this data buffer is an address byte.
0 = The address byte matched UADDR2.
1 = The address byte matched UADDR1.
0 = Buffer not closed due to reception of maximum number of IDLE characters
1 = Buffer closed due to reception of maximum number of IDLE characters (MAX_IDL).
er.
(MAX_IDL).
15
E
14
X
13
W
12
I
11
C
MC68360 USER’S MANUAL
10
A
M
9
RX BUFFER POINTER
DATA LENGTH
ID
8
—
7
—
6
BR
5
FR
4
PR
3
—
2
MOTOROLA
OV
1
CD
0
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