MC68302EH16C Freescale Semiconductor, MC68302EH16C Datasheet - Page 170

• Manufacturer Part Number: MC68302EH16C
• Description: IC MPU MULTI-PROTOCOL 132-PQFP
• Manufacturer: Freescale Semiconductor

Specifications of MC68302EH16C

• Processor Type: M683xx 32-Bit
• Speed: 16MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 132-MQFP, 132-PQFP
• Controller Family/series: 68K
• Core Size: 32 Bit
• Ram Memory Size: 1152Byte
• Cpu Speed: 16MHz
• No. Of Timers: 3
• Embedded Interface Type: SCP, TDM
• Digital Ic Case Style: PQFP
• Rohs Compliant: Yes
• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 16MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 5V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 132
• Package Type: PQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

Communications Processor (CP)
4.5.11.6 UART Address Recognition
In multidrop systems, more than two stations may be present on a network, with each having
a specific address. Figure 4-18 shows two examples of such a configuration. Frames com-
prised of many characters may be broadcast, with the first character acting as a destination
address. To achieve this, the UART frame is extended by one bit, called the address bit, to
distinguish between an address character and the normal data characters. The UART can
be configured to operate in a multidrop environment in which two modes are supported:
Each UART controller has two 8-bit address registers (UADDR1 and UADDR2) for address
recognition. In the automatic mode, the incoming address is checked against the lower order
byte of the UART address registers. Upon an address match, the address match (M) bit in
the BD is set/cleared to indicate which address character was matched. The data following
it is written to the same data buffer.
4-50
Automatic Multidrop Mode—The IMP automatically checks the incoming address charac-
ter and accepts the data following it only if the address matches one of two 8-bit preset
values. In this mode, UM1–UM0 = 11 in the UART mode register.
Nonautomatic Multidrop Mode—The IMP receives all characters. An address character is
always written to a new buffer (it may be followed by data characters in the same buffer).
In this mode, UM1–UM0 = 01 in the UART mode register.
MASTER
T
T
1
R
R
Figure 4-18. Two Configurations of UART Multidrop Operation
UADDR1
UADDR2
For 7-bit characters, the eighth bit (bit 7) in UADDR1 and
UADDR2 should be zero.
SLAVE 1
T
T
2
R
R
TWO 8-BIT ADDRESSES
CAN BE AUTOMATICALLY
RECOGNIZED IN EITHER
CONFIGURATION.
SLAVE 2
T
T
MC68302 USER’S MANUAL
3
R
R
NOTE
SLAVE 3
T
T
4
R
R
WOMS
1
SCON REGISTER
R
R
+V
+V
WIRED-OR MODE SELECT
ALLOWS MULTIPLE
TRANSMIT PINS TO BE
DIRECTLY CONNECTED.
MOTOROLA