MC68302EH16C Freescale Semiconductor, MC68302EH16C Datasheet - Page 417
![IC MPU MULTI-PROTOCOL 132-PQFP](/photos/6/76/67684/mc68302eh16c_sml.jpg)
MC68302EH16C
Manufacturer Part Number
MC68302EH16C
Description
IC MPU MULTI-PROTOCOL 132-PQFP
Manufacturer
Freescale Semiconductor
Datasheets
1.MC68302AG20C.pdf
(4 pages)
2.MC68302AG20C.pdf
(2 pages)
3.MC68302AG20C.pdf
(13 pages)
4.MC68302EH16C.pdf
(481 pages)
Specifications of MC68302EH16C
Processor Type
M683xx 32-Bit
Speed
16MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
132-MQFP, 132-PQFP
Controller Family/series
68K
Core Size
32 Bit
Ram Memory Size
1152Byte
Cpu Speed
16MHz
No. Of Timers
3
Embedded Interface Type
SCP, TDM
Digital Ic Case Style
PQFP
Rohs Compliant
Yes
Family Name
M68000
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
16MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
5V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
132
Package Type
PQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
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- MC68302AG20C PDF datasheet
- MC68302AG20C PDF datasheet #2
- MC68302AG20C PDF datasheet #3
- MC68302EH16C PDF datasheet #4
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- Download datasheet (2Mb)
With the above configuration, the data in the receive buffers will be as follows:
Four events in the SCCE2 event register will be set:
D.8.12 Special Uses of Transparent Mode
The following paragraphs discuss two special cases where transparent mode can be used
to extend the capabilities of the MC68302 UART mode.
D.8.12.1 5- OR 6-BIT UART. One special protocol of note that can be accomplished with
transparent mode is the building of a 5- or 6-bit UART. The UART on the SCCs offers 7- and
8-bit modes only.
A 5- or 6-bit UART can be accomplished with software and the transparent mode. Software
is responsible for inserting and deleting start and stop bits; the transparent mode provides
oversampling.
Select transparent mode for 8x the desired bit rate. For every bit of data to transmit, write a
byte of data to memory. A character will then be encoded as one byte of zeros for the start
bit, a byte of either zeros or ones for every bit in the character, and a byte of ones for each
stop bit. When there is no data to send, the transmitter will send out ones during the idle
period if the buffer had its L bit set.
Reception is more software intensive. The data is received at 8x the desired rate, and the
software must extract the start, stop, and character bits from the data stream. There is no
easy way to “byte align” the received data to byte boundaries in memory (as explained in
D.8.5 Transparent Mode with the NMSI Physical Interface) without some added external
hardware.
D.8.12.2 SYNCHRONOUS UART. A synchronous UART may also be built with transpar-
ent mode. As with a 5- or 6-bit UART, all data including start and stop bits must be placed
into the transmit buffer and the true data extracted from the raw transparent data that in-
cludes start and stop bits. (V.14 applications would also require the detection of deleted stop
bits.)
MOTOROLA
13. The final change is to set the ENT and ENR bits in the SCM2 register, causing the
—RX—One or more receive buffers have been used (in this case two).
—TX—One or more buffers have been transmitted (in this case one).
—BSY—Receive data was discarded due to lack of receive buffers (occurred because
—RCH—A word of data has been written to a receive buffer (occurred each time a word
Rx BD = $5000 $xxxx $xxxx $xxxx (This Rx BD is not yet available.)
transfers to begin.
SCM2 = $603F
Buffer1: $FF, data1, data2, ..., datae, dataf.
Buffer2: data10, data11, ..., data17, data18, (and then 7 $FF bytes).
the third Rx BD was not empty).
was written).
MC68302 USER’S MANUAL
MC68302 Applications
D-67
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