MC68302EH16C Freescale Semiconductor, MC68302EH16C Datasheet - Page 446

IC MPU MULTI-PROTOCOL 132-PQFP

MC68302EH16C

Manufacturer Part Number
MC68302EH16C
Description
IC MPU MULTI-PROTOCOL 132-PQFP
Manufacturer
Freescale Semiconductor

Specifications of MC68302EH16C

Processor Type
M683xx 32-Bit
Speed
16MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
132-MQFP, 132-PQFP
Controller Family/series
68K
Core Size
32 Bit
Ram Memory Size
1152Byte
Cpu Speed
16MHz
No. Of Timers
3
Embedded Interface Type
SCP, TDM
Digital Ic Case Style
PQFP
Rohs Compliant
Yes
Family Name
M68000
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
16MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
5V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
132
Package Type
PQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

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SCC Programming Reference
E.2.1.3.1 RFCR/TFCR—Rx Function Code/Tx Function Code. This
contains the function codes of the receive data buffers and transmit data buffers. The user
must initialize the function codes (FC2-FC0) to a value less than 7.
E.2.1.3.2 MRBLR—Maximum Rx Buffer Length. This 16-bit parameter defines the maxi-
mum receiver buffer length for each of the eight receive buffer descriptors.
E.2.1.3.3 MAX_IDL—Maximum IDLE Characters. This 16 bit parameter contains the
maximum number of IDLE characters that the SCC will wait before closing a receive buffer.
E.2.1.3.4 BRKCR—Break Count Register. This 16-bit parameter defines the number of
break characters to be transmitted when the STOP TRANSMIT command is executed.
E.2.1.3.5 PAREC—Receive Parity Error Counter. This 16-bit parameter is incremented
when a character is received with a parity error.
E.2.1.3.6 FRMEC—Receive Framing Error Counter. This 16 bit parameter is incre-
mented when no stop bit is detected in a received data string.
E.2.1.3.7 NOSEC—Receive Noise Counter. This 16-bit parameter is incremented when
the three samples taken in the middle of a bit are not identical.
E.2.1.3.8 BRKEC—Receive Break Condition Counter. This 16-bit parameter is incre-
mented when a break character string is detected.
E.2.1.3.9 UADDR1 and UADDR2. These 16-bit parameters contain the addresses used for
address recognition.
E.2.1.3.10 RCCR—Receive Control Character Register. The RCCR is a 16-bit register. If
a received character matches a defined control character for which the reject bit is set, the
UART controller will write the control character into the lower 8 bits (D7-D0) of RCCR and
generate a maskable interrupt. The upper 8-bits of RCCR are reserved.
E.2.1.3.11 Character1-Character7—Control Character 1-7. These seven 16-bit table
entries define the control characters that should be compared to the incoming characters.
For 7-bit characters, the eighth bit (bit 7) should be zero. Note that reserved bits in registers
should be written as zeros.
E-24
15
15
E
E
E
E
E
E
E
0
FC2
14
14
R
R
R
R
R
R
R
FC1
13
13
FC0
12
12
11
11
0
10
10
0
MC68360 USER’S MANUAL
9
0
9
8
0
8
7
0
7
FC2
6
FC1
5
CHARACTER1
CHARACTER2
CHARACTER3
CHARACTER4
CHARACTER5
CHARACTER6
CHARACTER7
FC0
4
3
0
16-bit
2
0
MOTOROLA
parameter
1
0
0
0
0

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