MC68302EH16C Freescale Semiconductor, MC68302EH16C Datasheet - Page 468

IC MPU MULTI-PROTOCOL 132-PQFP

MC68302EH16C

Manufacturer Part Number
MC68302EH16C
Description
IC MPU MULTI-PROTOCOL 132-PQFP
Manufacturer
Freescale Semiconductor

Specifications of MC68302EH16C

Processor Type
M683xx 32-Bit
Speed
16MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
132-MQFP, 132-PQFP
Controller Family/series
68K
Core Size
32 Bit
Ram Memory Size
1152Byte
Cpu Speed
16MHz
No. Of Timers
3
Embedded Interface Type
SCP, TDM
Digital Ic Case Style
PQFP
Rohs Compliant
Yes
Family Name
M68000
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
16MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
5V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
132
Package Type
PQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

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Design Checklist
F-4
23. SCCs, Diagnostics
24. UART, MAX_IDL
25. Write Zeroes into Reserved Locations
26. Event Registers, Read-Modify-Write
27. Microcode, RAM
When an unexplained SCC problem arises, three important debugging techniques can
be used to help isolate the problem area. First, to see if the problem is related to the
external M68000 bus, try configuring the transmit and/or receive buffers to be located
in the internal dual-port RAM. In this way, the external bus will not be required for
transmission or reception. Second, to see if the problem is related to the serial inter-
face pins, try setting the DIAG1–DIAG0 bits in the SCM register to loopback mode or
software operation. These techniques allow transmission and reception to be tested
without proper settings of the serial interface control pins. Loopback mode is also a
good test mechanism to build into the application board test code. Third, to see if the
problem is related to rise times, noise, or glitches on external serial clocks, try using
the SCC internal baud rate generator or try generating a clock externally with another
baud rate generator or timer and routing that clock externally to the SCC.
One common problem with UART mode is the setting of the MAX_IDL value. The max-
imum value is $0000, and the minimum value is $0001. A large value causes the re-
ceive buffer not to close until the entire idle period is complete. At slow serial data
rates, this time can be several minutes.
Zero fill all reserved locations to prevent unexpected behavior.
Do not use instructions that execute a read-modify-write cycle (e.g., ANDI, ORI, BSET,
BCLR) to clear bits in the event registers. A bit in such a register is cleared by writing
a one, rather than a zero, to the bit. The use of instructions that execute a read-modify-
write cycle inadvertently clears all bits in the event register. The clearing of all bits in
an event register could result in “lost” events. For example, when an interrupt handler
intentionally or unintentionally clears all bits of an event register upon exit of the han-
dler, all events occurring between the time of the entrance and exit of the interrupt han-
dler are lost. A proper handling of event registers is to clear particular bits near the
entrance of an interrupt handler. A proper instruction to use is the MOVE instruction
(e.g., “MOVE #$01, SCCE” clears bit 0 of the SCCE register).
If microcode from RAM is used (i.e., one of the packages available from Motorola), the
microcode must be downloaded into the MC68302 dual-port RAM prior to setting lo-
cation $0F8 to $0001. If this sequence is not followed, the CP will not function properly,
regardless of which protocol is selected.
MC68360 USER’S MANUAL
MOTOROLA

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