MC68302EH16C Freescale Semiconductor, MC68302EH16C Datasheet - Page 51

• Manufacturer Part Number: MC68302EH16C
• Description: IC MPU MULTI-PROTOCOL 132-PQFP
• Manufacturer: Freescale Semiconductor

Specifications of MC68302EH16C

• Processor Type: M683xx 32-Bit
• Speed: 16MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 132-MQFP, 132-PQFP
• Controller Family/series: 68K
• Core Size: 32 Bit
• Ram Memory Size: 1152Byte
• Cpu Speed: 16MHz
• No. Of Timers: 3
• Embedded Interface Type: SCP, TDM
• Digital Ic Case Style: PQFP
• Rohs Compliant: Yes
• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 16MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 5V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 132
• Package Type: PQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

SECTION 3
SYSTEM INTEGRATION BLOCK (SIB)
The MC68302 contains an extensive SIB that simplifies the job of both the hardware and
software designer. It integrates the M68000 core with the most common peripherals used in
an M68000-based system. The independent direct memory access (IDMA) controller re-
lieves the hardware designer of the extra effort and board logic needed to connect an exter-
nal DMA controller. The interrupt controller can be used in a dedicated mode to generate
interrupt acknowledge signals without external logic. Also, the chip-select signals and their
associated wait-state logic eliminate the need to generate chip-select signals externally. The
three timers simplify control and improve reliability. These and other features in the SIB con-
serve board space and cost while decreasing development time.
The SIB includes the following functions:
MOTOROLA
• IDMA Controller with Three Handshake Signals: DREQ, DACK, and DONE
• Interrupt Controller with Two Modes of Operation
• Parallel Input/Output (I/O) Ports, Some with Interrupt Capability
• On-Chip 1152-Byte Dual-Port RAM
• Three Timers Including a Software Watchdog Timer
• Four Programmable Chip-Select Lines with Wait-State Generator Logic
• On-Chip Clock Generator with Output Signal
• System Control
• Clock Control
• DRAM Refresh Controller
—System Status and Control Logic
—Disable CPU Logic (M68000)
—Bus Arbitration Logic with Low-Interrupt Latency Support
—Hardware Watchdog for Monitoring Bus Activity
—Low-Power (Standby) Modes
—Freeze Control for Debugging
—Adjustable CLKO Drive
—Three-state RCLK1 and TCLK1
—Disable BRG1
MC68302 USER’S MANUAL
3-1