MC68302EH16C Freescale Semiconductor, MC68302EH16C Datasheet - Page 463
MC68302EH16C
Manufacturer Part Number
MC68302EH16C
Description
IC MPU MULTI-PROTOCOL 132-PQFP
Manufacturer
Freescale Semiconductor
Datasheets
1.MC68302AG20C.pdf
(4 pages)
2.MC68302AG20C.pdf
(2 pages)
3.MC68302AG20C.pdf
(13 pages)
4.MC68302EH16C.pdf
(481 pages)
Specifications of MC68302EH16C
Processor Type
M683xx 32-Bit
Speed
16MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
132-MQFP, 132-PQFP
Controller Family/series
68K
Core Size
32 Bit
Ram Memory Size
1152Byte
Cpu Speed
16MHz
No. Of Timers
3
Embedded Interface Type
SCP, TDM
Digital Ic Case Style
PQFP
Rohs Compliant
Yes
Family Name
M68000
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
16MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
5V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
132
Package Type
PQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
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- MC68302AG20C PDF datasheet
- MC68302AG20C PDF datasheet #2
- MC68302AG20C PDF datasheet #3
- MC68302EH16C PDF datasheet #4
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- Download datasheet (2Mb)
E.3.2.2 GENERAL AND TRANSPARENT PROTOCOL-SPECIFIC RAM INITIALIZATION.
E.3.2.3 SCC INITIALIZATION.
E.3.2.4 SCC OPERATION.
E.3.2.5 SCC INTERRUPT HANDLING.
MOTOROLA
1. Write the port A and port B control registers (PACNT and PBCNT) to configure SCC2
2. Write SIMODE to configure the SCCs physical interface.
3. Write SIMASK if IDL or GCI multiplexed mode was selected in SIMODE.
4. Write RFCR/TFCR.
5. Write MRBLR.
6. Write SCON.
7. Write SCM without setting the ENR and ENT bits.
8. Write DSR.
9. Write SCCE with $FF to clear any previous events.
10. Write SCCM.
11. Write IMR.
12. Write the Rx buffer descriptor control/status, buffer pointer high, and buffer pointer low
13. Prepare transmit buffers as required to transmit data on the SCC. Set the R bit in each
14. Write SCM, setting the ENR and ENT bits to enable reception and transmission on the
15. Prepare more transmit buffers as required to transmit data on the SCC.
1. Read the SCC event register.
2. Clear any unmasked bits that will be used in this interrupt routine.
3. Handle the interrupt events as required by the system.
4. Clear the appropriate SCC bit in the in-service register (ISR) of the interrupt controller.
5. Return from the interrupt.
or SCC3 serial interface pins as peripheral pins, if SCC2 or SCC3 is used.
words for all of the buffer descriptors that are going to be used. Set the W bit in the last
buffer descriptor to be used in the queue.
Tx buffer descriptor's control/status word when the data buffer is ready for transmis-
sion. Set the W bit in the last Tx buffer descriptor in the table so that the IMP will use
the first Tx buffer descriptor (after the user sets the R bit) for the next transmission.
SCC.
MC68360 USER’S MANUAL
SCC Programming Reference
E-41
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