MC68302EH16C Freescale Semiconductor, MC68302EH16C Datasheet - Page 452

• Manufacturer Part Number: MC68302EH16C
• Description: IC MPU MULTI-PROTOCOL 132-PQFP
• Manufacturer: Freescale Semiconductor

Specifications of MC68302EH16C

• Processor Type: M683xx 32-Bit
• Speed: 16MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 132-MQFP, 132-PQFP
• Controller Family/series: 68K
• Core Size: 32 Bit
• Ram Memory Size: 1152Byte
• Cpu Speed: 16MHz
• No. Of Timers: 3
• Embedded Interface Type: SCP, TDM
• Digital Ic Case Style: PQFP
• Rohs Compliant: Yes
• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 16MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 5V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 132
• Package Type: PQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

SCC Programming Reference
E.2.2.5 SCC INTERRUPT HANDLING.
E.3 TRANSPARENT PROGRAMMING REFERENCE SECTION
This subsection discusses the registers and parameters required to program an SCC for
transparent operation. At the end of this subsection is a generic algorithm for programming
the SCC.
E.3.1 Transparent Programming Model
The programming model and memory map for the transparent protocol is shown in E-1. The
offsets for each SCC are given above each table. Some parameters are common to all pro-
tocols. The transparent parameters are shown for those entries that are protocol specific.
Table E-3(b) depicts the general and protocol-specific parameter RAM for each SCC. The
SCC registers are shown in Table E-3(c), and the communications processor registers are
shown in Table E-3(d). Note that reserved bits in registers should be written as zeros.
E-30
1. Read the SCC event register.
2. Clear any unmasked bits that will be used in this interrupt routine.
3. Handle the interrupt events as required by the system.
4. Clear the appropriate SCC bit in the in-service register (ISR) of the interrupt controller.
5. Return from the interrupt.
MC68360 USER’S MANUAL
MOTOROLA