MC68302EH16C Freescale Semiconductor, MC68302EH16C Datasheet - Page 435

• Manufacturer Part Number: MC68302EH16C
• Description: IC MPU MULTI-PROTOCOL 132-PQFP
• Manufacturer: Freescale Semiconductor

Specifications of MC68302EH16C

• Processor Type: M683xx 32-Bit
• Speed: 16MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 132-MQFP, 132-PQFP
• Controller Family/series: 68K
• Core Size: 32 Bit
• Ram Memory Size: 1152Byte
• Cpu Speed: 16MHz
• No. Of Timers: 3
• Embedded Interface Type: SCP, TDM
• Digital Ic Case Style: PQFP
• Rohs Compliant: Yes
• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 16MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 5V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 132
• Package Type: PQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

I—Interrupt
L—Last in Frame
TC—Tx CRC
Bits 9-2—Reserved for future use
UN—Underrun
CT—CTS Lost
E.1.1.5.2 Transmit Buffer Data Length. This 16-bit value is written by the user to indicate
the number of data bytes to be transmitted from the data butter.
E.1.1.5.3 Transmit Buffer Pointer. This 32-bit value is written by the user to indicate the
address of the first byte of data in the data buffer.
E.1.2 Programming the SCC for HDLC
This section gives a generic algorithm for programming an SCC to handle HDLC. The algo-
rithm is intended to show what must be done and in what order to initialize the SCC and pre-
pare the SCC for transmission and reception. The algorithm is not specific and assumes that
the lMP and other on-chip peripherals have been initialized as required by the system hard-
ware (timers, chip selects, etc.).
E.1.2.1 CP INITIALIZATION.
E.1.2.2 GENERAL AND HDLC PROTOCOL-SPECIFIC RAM INITIALIZATION.
MOTOROLA
1. Write the port A and port B control registers (PACNT and PBCNT) to configure SCC2
2. Write SIMODE to configure the SCCs physical interface.
3. Write SIMASK if IDL or GCI multiplexed mode was selected in SIMODE.
4. Write RFCR/TFCR.
0 = The TXB bit in the event register is not set when this buffer is closed.
1 = The TXB bit in the event register is set if this buffer closed without an error. If an
0 = This buffer is not the last buffer in a frame.
1 = This buffer is the last buffer in a frame.
0 = Transmit the closing flag after the last data byte.
1 = Transmit the CRC sequence after the last data byte.
0 = No transmitter underrun occurred.
1 = A transmitter underrun condition occurred while transmitting the associated data
0 = No CTS or L1GR lost was detected during frame transmission.
1 = CTS in NMSI mode or L1GR in IDL/GCI mode was lost during frame transmission.
or SCC3 serial interface pins as peripheral pins, if SCC2 or SCC3 is used.
error occurred, then TXE is set.
buffer.
MC68360 USER’S MANUAL
SCC Programming Reference
E-13