MC68302EH16C Freescale Semiconductor, MC68302EH16C Datasheet - Page 383

IC MPU MULTI-PROTOCOL 132-PQFP

MC68302EH16C

Manufacturer Part Number
MC68302EH16C
Description
IC MPU MULTI-PROTOCOL 132-PQFP
Manufacturer
Freescale Semiconductor

Specifications of MC68302EH16C

Processor Type
M683xx 32-Bit
Speed
16MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
132-MQFP, 132-PQFP
Controller Family/series
68K
Core Size
32 Bit
Ram Memory Size
1152Byte
Cpu Speed
16MHz
No. Of Timers
3
Embedded Interface Type
SCP, TDM
Digital Ic Case Style
PQFP
Rohs Compliant
Yes
Family Name
M68000
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
16MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
5V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
132
Package Type
PQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

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The IDL bus connects one IDL master to one or more IDL slaves. The IDL bus timing is driv-
en by the master device.
The bus signals are as follows:
D.6.6 IMP/IDL Interconnection
The MC68302 directly connects to the IDL bus with no glue logic. The MC68302 is an IDL
slave (accepts IDL timing from the bus). In the application described, the IDL master device
is the MC145475 S/T interface chip (see Figure D-14).
MOTOROLA
TXDATA
RXDATA
CLOCK
• CLOCK — always provided from the master to the slave. It provides the bit timing for
• SYNC —provides the framing for the IDL. The SYNC occurs once per 125- sec frame
• TXDATA — drives the data from one chip to another. The line is in high impedance
• RXDATA — the input line that receives data from the TXDATA of another part.
SYNC
the data traveling across the IDL.
and is active high one full clock cycle in the bit immediately preceding the data transac-
tion.
when no data transaction occurs.
B1
B1
Figure D-13. IDL Frame Structure
MC68302 USER’S MANUAL
D
D
A
A
B2
B2
D
D
M
M
MC68302 Applications
D-33

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