MC68302EH16C Freescale Semiconductor, MC68302EH16C Datasheet - Page 157
MC68302EH16C
Manufacturer Part Number
MC68302EH16C
Description
IC MPU MULTI-PROTOCOL 132-PQFP
Manufacturer
Freescale Semiconductor
Datasheets
1.MC68302AG20C.pdf
(4 pages)
2.MC68302AG20C.pdf
(2 pages)
3.MC68302AG20C.pdf
(13 pages)
4.MC68302EH16C.pdf
(481 pages)
Specifications of MC68302EH16C
Processor Type
M683xx 32-Bit
Speed
16MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
132-MQFP, 132-PQFP
Controller Family/series
68K
Core Size
32 Bit
Ram Memory Size
1152Byte
Cpu Speed
16MHz
No. Of Timers
3
Embedded Interface Type
SCP, TDM
Digital Ic Case Style
PQFP
Rohs Compliant
Yes
Family Name
M68000
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
16MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
5V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
132
Package Type
PQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
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- MC68302AG20C PDF datasheet
- MC68302AG20C PDF datasheet #2
- MC68302AG20C PDF datasheet #3
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4.5.6.5 Other General Parameters
Additional parameters are listed in Table 4-2. These parameters do not need to be accessed
by the user in normal operation, and are listed only because they may provide helpful infor-
mation for experienced users and for debugging.
The Rx and Tx internal data pointers are updated by the SDMA channels to show the next
address in the buffer to be accessed.
The Tx byte count is a down-count value that is initialized with the Tx BD data length and
decremented with every byte read by the SDMA channels. The Rx byte count is a down-
count value that is initialized with the MRBLR value and decremented with every byte written
by the SDMA channels.
The Rx internal state, Tx internal state, Rx temp, Tx temp, and reserved areas are for RISC
use only.
4.5.7 SCC Initialization
The SCCs require a number of registers and parameters to be configured after a power-on
reset. The following is a proper sequence for initializing the SCCs, regardless of the protocol
used.
MOTOROLA
1. If SCC2 or SCC3 is used, write the parallel port A and B control registers (PACNT and
2. Write SIMODE to configure the serial channels physical interface for the three SCCs
PBCNT) to configure pins as parallel I/O lines or peripheral functions as needed (see
3.3 Parallel I/O Ports).
1.
2.
3.
The Rx byte count, Rx internal data pointer, and RBD# can be
used to extract data out of a receive buffer before the buffer is
completely full. However, the use of this technique is not recom-
mended unless no other solution to the application requirement
can be found! The IMP was specifically designed to eliminate the
need for this technique by allowing a programmable receive
buffer size for each SCC, by closing buffers immediately upon
an error, and by closing a receive buffer after a user-program-
mable line idle period in the case of UART mode. Having consid-
ered these capabilities, a user desiring to extract data from a
partially full data buffer should note the following cautions:
The Rx byte count and Rx internal data pointer may not be
valid before the first byte has been written to the buffer or af-
ter the last byte has been written to the buffer.
The parameters, Rx byte count, Rx internal data pointer,
and RBD#, are not updated simultaneously.
The RBD# and the empty bit of the Rx BD are not updated
simultaneously.
MC68302 USER’S MANUAL
NOTE
Communications Processor (CP)
4-37
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