MC68302EH16C Freescale Semiconductor, MC68302EH16C Datasheet - Page 462
MC68302EH16C
Manufacturer Part Number
MC68302EH16C
Description
IC MPU MULTI-PROTOCOL 132-PQFP
Manufacturer
Freescale Semiconductor
Datasheets
1.MC68302AG20C.pdf
(4 pages)
2.MC68302AG20C.pdf
(2 pages)
3.MC68302AG20C.pdf
(13 pages)
4.MC68302EH16C.pdf
(481 pages)
Specifications of MC68302EH16C
Processor Type
M683xx 32-Bit
Speed
16MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
132-MQFP, 132-PQFP
Controller Family/series
68K
Core Size
32 Bit
Ram Memory Size
1152Byte
Cpu Speed
16MHz
No. Of Timers
3
Embedded Interface Type
SCP, TDM
Digital Ic Case Style
PQFP
Rohs Compliant
Yes
Family Name
M68000
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
16MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
5V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
132
Package Type
PQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
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- MC68302AG20C PDF datasheet
- MC68302AG20C PDF datasheet #2
- MC68302AG20C PDF datasheet #3
- MC68302EH16C PDF datasheet #4
- Current page: 462 of 481
- Download datasheet (2Mb)
SCC Programming Reference
R—Ready
X—External Buffer
W—Wrap (final BD in table)
I—Interrupt
L—Last in Frame
Bits 10-2—Reserved for future use; should be written with zero by the user.
UN—Underrun
CT—CTS Lost
E.3.1.5.2 Transmit Buffer Data Length. This 16-bit value is written by the user to indicate
the number of data bytes to be transmitted from the data buffer.
E.3.1.5.3 Transmit Buffer Pointer. This 32-bit value is written by the user to indicate the
address of the first byte of data in the data buffer.
E.3.2 Programming the SCC for Transparent
This section gives a generic algorithm for programming an SCC to handle the transparent
protocol. The algorithm is intended to show what must be done and in what order to initialize
the SCC and prepare the SCC for transmission and reception. The algorithm is not specific
and assumes that the IMP and other on-chip peripherals have been initialized as required
by the system hardware (timers, chip selects, etc.).
E.3.2.1 CP INITIALIZATION.
E-40
0 = This data buffer is not currently ready for transmission.
1 = This data buffer has been prepared by the user for transmission but has not yet
0 = The data buffer associated with this BD is in internal dual-port RAM.
1 = The data buffer associated with this BD is in external memory.
0 = This is not the last BD in the transmit BD table.
1 = This is the last BD in the transmit BD table.
0 = No interrupt is generated when this buffer is closed.
1 = The TX bit in the event register is set if this buffer closed without an error. If an error
0 = This buffer is not the last buffer in the transmitted block.
1 = This buffer is the last buffer in the transmitted block.
0 = No transmitter underrun occurred.
1 = A transmitter underrun condition occurred while transmitting the associated data
0 = No CTS or L1GR lost was detected during frame transmission.
1 = CTS in NMSI mode or L1GR in IDL/GCI mode was lost during frame transmission.
been fully transmitted. Must be set by the user to enable transmission of the buffer.
occurred, then TXE is set.
buffer.
MC68360 USER’S MANUAL
MOTOROLA
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