MC68302EH16C Freescale Semiconductor, MC68302EH16C Datasheet - Page 152

• Manufacturer Part Number: MC68302EH16C
• Description: IC MPU MULTI-PROTOCOL 132-PQFP
• Manufacturer: Freescale Semiconductor

Specifications of MC68302EH16C

• Processor Type: M683xx 32-Bit
• Speed: 16MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 132-MQFP, 132-PQFP
• Controller Family/series: 68K
• Core Size: 32 Bit
• Ram Memory Size: 1152Byte
• Cpu Speed: 16MHz
• No. Of Timers: 3
• Embedded Interface Type: SCP, TDM
• Digital Ic Case Style: PQFP
• Rohs Compliant: Yes
• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 16MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 5V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 132
• Package Type: PQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

Communications Processor (CP)
4.5.5 Buffer Descriptors Table
Data associated with each SCC channel is stored in buffers. Each buffer is referenced by a
buffer descriptor (BD). BDs are located in each channel's BD table (located in dual-port
RAM). There are two such tables for each SCC channel: one is used for data received from
the serial line; the other is used to transmit data. The actual buffers may reside in either ex-
ternal memory or internal memory (dual-port RAM). For internal memory data buffers, the
data buffer pointer is in the low-order data pointer word and is an offset from the device base
address to any available area in the dual-port RAM. (Data buffers may reside in the param-
eter RAM of an SCC if it is not enabled).
The BD table allows the user to define up to eight buffers for the transmit channel and up to
eight buffers for the receive channel (Figure 4-15). Each BD table forms a circular queue.
The format of the BDs is the same for each SCC mode of operation (HDLC, UART, DDCMP,
BISYNC, V.110, and transparent) and for both transmit or receive. Only the first field (con-
taining status and control bits) differs for each protocol. The BD format is shown in Figure 4-
16.
4-32
DUAL-PORT RAM (1152 BYTES)
SMC1 DESCRIPTOR
SMC2 DESCRIPTOR
SCP DESCRIPTOR
TX DATA BUFFER
SCC1 BUFFER
DESCRIPTORS
SCC3 BUFFER
DESCRIPTORS
SCC2 BUFFER
DESCRIPTORS
TABLE
TABLE
TABLE
Figure 4-15. Memory Structure
MC68302 USER’S MANUAL
D
R
E
RX BUFFER DESCRIPTORS (8)
TX BUFFER DESCRIPTORS (8)
FRAME STATUS
FRAME STATUS
DATA POINTER
DATA POINTER
DATA LENGTH
DATA COUNT
TX DATA
RX DATA
DATA
EXTERNAL MEMORY
RX DATA BUFFER
TX DATA BUFFER
MOTOROLA