MC68302EH16C Freescale Semiconductor, MC68302EH16C Datasheet - Page 450

IC MPU MULTI-PROTOCOL 132-PQFP

MC68302EH16C

Manufacturer Part Number
MC68302EH16C
Description
IC MPU MULTI-PROTOCOL 132-PQFP
Manufacturer
Freescale Semiconductor

Specifications of MC68302EH16C

Processor Type
M683xx 32-Bit
Speed
16MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
132-MQFP, 132-PQFP
Controller Family/series
68K
Core Size
32 Bit
Ram Memory Size
1152Byte
Cpu Speed
16MHz
No. Of Timers
3
Embedded Interface Type
SCP, TDM
Digital Ic Case Style
PQFP
Rohs Compliant
Yes
Family Name
M68000
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
16MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
5V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
132
Package Type
PQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

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SCC Programming Reference
X—External Buffer
W—Wrap (final BD in table)
I—Interrupt
CR—Clear-to-Send Report
A—Address
P—Preamble
Bits 8–1—Reserved for future use
CT—CTS Lost
E.2.1.5.2 Transmit Buffer Data Length. This 16-bit value is written by the user to indicate
the number of octets to be transmitted from the data butter.
E2.1.5.3 Transmit Buffer Pointer. This 32-bit value is written by the user to indicate the
address of the first byte of data in the data buffer.
E.2.2 Programming the SCC for UART
This section gives a generic algorithm for programming an SCC to handle UART. The algo-
rithm is intended to show what must be done and in what order to initialize the SCC and pre-
pare the SCC for transmission and reception. The algorithm is not specific and assumes that
the lMP and other on-chip peripherals have been initialized as required by the system hard-
ware (timers, chip selects, etc.).
E-28
0 = The data buffer associated with this BD is in internal dual port RAM.
1 = The data buffer associated with this BD is in external memory.
0 = This is not the last BD in the transmit BD table.
1 = This is the last BD in the transmit BD table.
0 = The TXB bit in the event register is not set when this buffer is closed.
1 = The TXB bit in the event register is set if this buffer closed without an error. If an
0 = The buffer following this buffer, if ready, will be transmitted with no delay; less pre-
1 = Normal CTS lost (CT bit) error reporting, and two bits of idle occur between back-
0 = This buffer contains data only.
1 = This buffer contains address character(s) only.
0 = No preamble sequence is sent.
1 = The UART sends a preamble sequence (set of 9 to 13 bits) before sending the da-
0 = No CTS or L1GR lost was detected during frame transmission.
1 = CTS in NMSI mode or L1GR in IDL/GCI mode was lost during frame transmission.
error occurred, then TXE is set.
cise CT bit reporting.
to-back buffers.
ta.
MC68360 USER’S MANUAL
MOTOROLA

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