MC68302EH16C Freescale Semiconductor, MC68302EH16C Datasheet - Page 45

• Manufacturer Part Number: MC68302EH16C
• Description: IC MPU MULTI-PROTOCOL 132-PQFP
• Manufacturer: Freescale Semiconductor

Specifications of MC68302EH16C

• Processor Type: M683xx 32-Bit
• Speed: 16MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 132-MQFP, 132-PQFP
• Controller Family/series: 68K
• Core Size: 32 Bit
• Ram Memory Size: 1152Byte
• Cpu Speed: 16MHz
• No. Of Timers: 3
• Embedded Interface Type: SCP, TDM
• Digital Ic Case Style: PQFP
• Rohs Compliant: Yes
• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 16MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 5V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 132
• Package Type: PQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

identical. When any SCC, SCP, or SMC channel buffer descriptors or parameters are not
used, their parameter RAM area can be used for additional memory. For detailed informa-
tion about the use of the buffer descriptors and protocol parameters in a specific protocol,
see 4.5 Serial Communication Controllers (SCCs). Base + 67E contains the MC68302 revi-
sion number. Revision A parts (mask 1B14M) correspond to the value $0001. Revision B
parts (mask 2B14M and 3B14M which are described in this manual) correspond to the value
$0002. Revision C and D parts have revision number $0003.
MOTOROLA
Base + 4BF
Base + 4C0
Base + 400
Base + 408
Base + 410
Base + 418
Base + 420
Base + 428
Base + 430
Base + 438
Base + 440
Base + 448
Base + 450
Base + 458
Base + 460
Base + 468
Base + 470
Base + 478
Base + 480
Base + 4FF
Base + 500
Base + 508
Base + 510
Base + 518
Base + 520
Base + 528
Base + 530
Base + 538
Base + 540
Base + 548
Base + 550
Base + 558
Base + 560
Base + 568
Base + 570
Base + 578
Address
•
•
•
•
•
•
4 Word
4 Word
4 Word
4 Word
4 Word
4 Word
4 Word
4 Word
4 Word
4 Word
4 Word
4 Word
4 Word
4 Word
4 Word
4 Word
4 Word
4 Word
4 Word
4 Word
4 Word
4 Word
4 Word
4 Word
4 Word
4 Word
4 Word
4 Word
4 Word
4 Word
4 Word
4 Word
Width
Table 2-8. Parameter RAM
MC68302 USER’S MANUAL
Block
SCC1
SCC1
SCC1
SCC1
SCC1
SCC1
SCC1
SCC1
SCC1
SCC1
SCC1
SCC1
SCC1
SCC1
SCC1
SCC1
SCC1
SCC1
SCC2
SCC2
SCC2
SCC2
SCC2
SCC2
SCC2
SCC2
SCC2
SCC2
SCC2
SCC2
SCC2
SCC2
SCC2
SCC2
Specific Protocol Parameters
Tx BD 6/DRAM Refresh
Tx BD 7/DRAM Refresh
(Not Implemented)
Description
Reserved
Rx BD 0
Rx BD 1
Rx BD 2
Rx BD 3
Rx BD 4
Rx BD 5
Rx BD 6
Rx BD 7
Rx BD 0
Rx BD 1
Rx BD 2
Rx BD 3
Rx BD 4
Rx BD 5
Rx BD 6
Rx BD 7
Tx BD 0
Tx BD 1
Tx BD 2
Tx BD 3
Tx BD 4
Tx BD 5
Tx BD 6
Tx BD 7
Tx BD 0
Tx BD 1
Tx BD 2
Tx BD 3
Tx BD 4
Tx BD 5
MC68000/MC68008 Core
2-15