MC68302EH16C Freescale Semiconductor, MC68302EH16C Datasheet - Page 406

• Manufacturer Part Number: MC68302EH16C
• Description: IC MPU MULTI-PROTOCOL 132-PQFP
• Manufacturer: Freescale Semiconductor

Specifications of MC68302EH16C

• Processor Type: M683xx 32-Bit
• Speed: 16MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 132-MQFP, 132-PQFP
• Controller Family/series: 68K
• Core Size: 32 Bit
• Ram Memory Size: 1152Byte
• Cpu Speed: 16MHz
• No. Of Timers: 3
• Embedded Interface Type: SCP, TDM
• Digital Ic Case Style: PQFP
• Rohs Compliant: Yes
• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 16MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 5V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 132
• Package Type: PQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

(INPUT)
(INPUT)
(SYNC)
MC68302 Applications
Figure D-28 shows an external loopback example which illustrates how the receive and
transmit cases function together. RTS is externally connected to CD (sync), and CTS is a
don't-care since software operation (DIAG1 = 1 and DIAG0 = 1) is chosen.
If you combine the 6.5 cycle TCLK delay on transmission with the CD (sync) signal being
provided on the second bit of the frame (–1.5 clock delay (see Figure D-27), then the first
byte stored in the receive buffer is an $FF (i.e., 6.5 — (–1.5) = 8 clock delay).
D.8.6 Other NMSI Modes
Two transparent mode variations are available for use with an NMSI: BISYNC mode and
TRANSYNC mode. These modes are described in detail in the following paragraphs.
D.8.6.1 BISYNC MODE. You can solve the problem of demarcating frames if you can af-
ford to exclude two special characters from the data. This, of course, is only possible when
you can define the protocol at both ends of the communication link. Normal BISYNC mode
can be used to do this. Normal BISYNC mode has the advantage of being able to store an
odd number of bytes in the receive buffer, rather than words. A disadvantage, however, is
lower serial performance.
D-56
CD (SYNC)
RCLK
RXD
(I/O)
(INPUT)
(INPUT)
RCLK
RXD
(I/O)
DON'T
CARE
EXSYN = 1
NTSYN = 1
DIAG1-DIAG0 BITS = 00
DON'T
CARE
EXSYN = 1
NTSYN = 1
DIAG1-DIAG0 BITS = 00
Figure D-28. External Loopback with RTS Connected to CD
Figure D-27. Using CD (Sync) in the NMSI Receive Case
FIRST BIT OF DATA RECEIVED INTO BUFFER
FIRST BIT OF DATA RECEIVED INTO BUFFER
CD SHOULD BE LATCHED HERE ON
THE RISING RCLK OF THE SECOND
BIT OF THE FRAME.
CD SHOULD BE LATCHED HERE ON
THE RISING RCLK OF THE SECOND
BIT OF THE FRAME.
MC68302 USER’S MANUAL
NO EFFECT; ONLY
THE FALLING EDGE
IS DETECTED.
NO EFFECT; ONLY
THE FALLING EDGE
IS DETECTED.
DON'T
CARE
FRAME ENDS BECAUSE ENTER
HUNT MODE COMMAND WAS
GIVEN HERE.
DON'T
CARE
FRAME ENDS BECAUSE ENT
HUNT MODE COMMAND WAS
GIVEN HERE.
MOTOROLA
NEW
FRAME
NEW
FRAME