SAM3X8E Atmel Corporation, SAM3X8E Datasheet - Page 101

• Manufacturer Part Number: SAM3X8E
• Manufacturer: Atmel Corporation

11.12.2.2
11.12.2.3
11.12.2.4
11.12.2.5
11.12.2.6
11057A–ATARM–17-Feb-12
11057A–ATARM–17-Feb-12
Operation
Offset addressing
Pre-indexed addressing
Post-indexed addressing
Restrictions
LDR instructions load one or two registers with a value from memory.
STR instructions store one or two register values to memory.
Load and store instructions with immediate offset can use the following addressing modes:
The offset value is added to or subtracted from the address obtained from the register Rn. The
result is used as the address for the memory access. The register Rn is unaltered. The assem-
bly language syntax for this mode is:
The offset value is added to or subtracted from the address obtained from the register Rn. The
result is used as the address for the memory access and written back into the register Rn. The
assembly language syntax for this mode is:
The address obtained from the register Rn is used as the address for the memory access. The
offset value is added to or subtracted from the address, and written back into the register Rn.
The assembly language syntax for this mode is:
The value to load or store can be a byte, halfword, word, or two words. Bytes and halfwords can
either be signed or unsigned. See
Table 11-18
Table 11-18. Offset ranges
For load instructions:
When Rt is PC in a word load instruction:
For store instructions:
Instruction type
Word, halfword, signed
halfword, byte, or signed
byte
Two words
• Rt can be SP or PC for word loads only
• Rt must be different from Rt2 for two-word loads
• Rn must be different from Rt and Rt2 in the pre-indexed or post-indexed forms.
• bit[0] of the loaded value must be 1 for correct execution
• a branch occurs to the address created by changing bit[0] of the loaded value to 0
• if the instruction is conditional, it must be the last instruction in the IT block.
[Rn, #offset]
[Rn, #offset]!
[Rn], #offset
shows the ranges of offset for immediate, pre-indexed and post-indexed forms.
Immediate offset
multiple of 4 in the
range 1020 to
1020
255 to 4095
“Address alignment” on page
Pre-indexed
multiple of 4 in the
range 1020 to
1020
255 to 255
95.
Post-indexed
multiple of 4 in the
range 1020 to
1020
255 to 255
SAM3X/A
SAM3X/A
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