SAM3X8E Atmel Corporation, SAM3X8E Datasheet - Page 419

• Manufacturer Part Number: SAM3X8E
• Manufacturer: Atmel Corporation

• CAS: CAS Latency
Reset value is two cycles.
In the SDRAMC, only a CAS latency of one, two and three cycles are managed.
Values which are not listed in the table must be considered as “reserved”.
• DBW: Data Bus Width
Reset value is 16 bits
This field defines the Data Bus Width, which is 16 bits. It must be set to 1.
• TWR: Write Recovery Delay
Reset value is two cycles.
This field defines the Write Recovery Time in number of cycles. Number of cycles is between 0 and 15.
• TRC_TRFC: Row Cycle Delay and Row Refresh Cycle
Reset value is seven cycles.
This field defines two timings:
The number of cycles is between 0 and 15. The end user will have to program max {t
• TRP: Row Precharge Delay
Reset value is three cycles.
This field defines the delay between a Precharge Command and another Command in number of cycles. Number of cycles
is between 0 and 15.
• TRCD: Row to Column Delay
Reset value is two cycles.
This field defines the delay between an Activate Command and a Read/Write Command in number of cycles. Number of
cycles is between 0 and 15.
• TRAS: Active to Precharge Delay
Reset value is five cycles.
This field defines the delay between an Activate Command and a Precharge Command in number of cycles. Number of
cycles is between 0 and 15.
11057A–ATARM–17-Feb-12
11057A–ATARM–17-Feb-12
the delay (t
the delay (t
and the delay (t
Value
01
10
11
RFC
RFC
) between two Refresh commands,
) between Refresh command and an Activate command
RC
) between two Active commands in number of cycles.
LATENCY1
LATENCY2
LATENCY3
Name
1 cycle CAS latency
2 cycle CAS latency
3 cycle CAS latency
Description
RC
, t
RFC
}.
SAM3X/A
SAM3X/A
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