SAM3X8E Atmel Corporation, SAM3X8E Datasheet - Page 607

no-image

SAM3X8E

Manufacturer Part Number
SAM3X8E
Description
Manufacturer
Atmel Corporation
Datasheets
30.7.8
30.7.9
11057A–ATARM–17-Feb-12
11057A–ATARM–17-Feb-12
Loop Mode
Interrupt
Note:
Figure 30-15. Receive Frame Format in Continuous Mode
Note:
The receiver can be programmed to receive transmissions from the transmitter. This is done by
setting the Loop Mode (LOOP) bit in SSC_RFMR. In this case, RD is connected to TD, RF is
connected to TF and RK is connected to TK.
Most bits in SSC_SR have a corresponding bit in interrupt management registers.
The SSC can be programmed to generate an interrupt when it detects an event. The interrupt is
controlled by writing SSC_IER (Interrupt Enable Register) and SSC_IDR (Interrupt Disable Reg-
ister) These registers enable and disable, respectively, the corresponding interrupt by setting
and clearing the corresponding bit in SSC_IMR (Interrupt Mask Register), which controls the
generation of interrupts by asserting the SSC interrupt line connected to the NVIC.
Figure 30-16. Interrupt Block Diagram
1. STTDLY is set to 0. In this example, SSC_THR is loaded twice. FSDEN value has no effect on
1. STTDLY is set to 0.
the transmission. SyncData cannot be output in continuous mode.
Transmitter
Receiver
RD
TXEMPTY
RXSYNC
TXSYNC
RXRDY
OVRUN
TXRDY
Start = Enable Receiver
To SSC_RHR
DATLEN
Data
SSC_IER
Set
SSC_IMR
Interrupt
Control
To SSC_RHR
DATLEN
Data
SSC_IDR
Clear
SSC Interrupt
SAM3X/A
SAM3X/A
607
607

Related parts for SAM3X8E